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authorDave Airlie <airlied@redhat.com>2009-03-20 10:52:17 +1000
committerDave Airlie <airlied@redhat.com>2009-03-20 10:52:17 +1000
commit407e8ae5b167b0193e1e5b1266a5d61ed836dfb5 (patch)
tree2d9d05a5c3122f41a13aa8bd9ae921c1176e6b0d /src/gallium/drivers/r300/r300_reg.h
parentbdaa0341caffc353fd26bbd91865c2d86eed11c1 (diff)
parent114bb54324f22cb53bcd14607234d0acd74d37bd (diff)
Merge remote branch 'main/master' into radeon-rewrite
Conflicts: src/mesa/drivers/dri/r300/r300_cmdbuf.c src/mesa/drivers/dri/r300/r300_state.c src/mesa/drivers/dri/r300/r300_swtcl.c src/mesa/drivers/dri/r300/radeon_ioctl.c src/mesa/drivers/dri/radeon/radeon_screen.c
Diffstat (limited to 'src/gallium/drivers/r300/r300_reg.h')
-rw-r--r--src/gallium/drivers/r300/r300_reg.h248
1 files changed, 130 insertions, 118 deletions
diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h
index dbd0cc28e2..6f3ad970ab 100644
--- a/src/gallium/drivers/r300/r300_reg.h
+++ b/src/gallium/drivers/r300/r300_reg.h
@@ -64,7 +64,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
#define R300_SE_VPORT_ZSCALE 0x1DA8
#define R300_SE_VPORT_ZOFFSET 0x1DAC
-
+#define R300_VAP_PORT_IDX0 0x2040
/*
* Vertex Array Processing (VAP) Control
*/
@@ -139,17 +139,25 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
# define R300_VAP_OUTPUT_VTX_FMT_1__3_COMPONENTS 3
# define R300_VAP_OUTPUT_VTX_FMT_1__4_COMPONENTS 4
-#define R300_SE_VTE_CNTL 0x20b0
-# define R300_VPORT_X_SCALE_ENA (1 << 0)
-# define R300_VPORT_X_OFFSET_ENA (1 << 1)
-# define R300_VPORT_Y_SCALE_ENA (1 << 2)
-# define R300_VPORT_Y_OFFSET_ENA (1 << 3)
-# define R300_VPORT_Z_SCALE_ENA (1 << 4)
-# define R300_VPORT_Z_OFFSET_ENA (1 << 5)
-# define R300_VTX_XY_FMT (1 << 8)
-# define R300_VTX_Z_FMT (1 << 9)
-# define R300_VTX_W0_FMT (1 << 10)
-# define R300_SERIAL_PROC_ENA (1 << 11)
+#define R300_VAP_VPORT_XSCALE 0x2098
+#define R300_VAP_VPORT_XOFFSET 0x209c
+#define R300_VAP_VPORT_YSCALE 0x20a0
+#define R300_VAP_VPORT_YOFFSET 0x20a4
+#define R300_VAP_VPORT_ZSCALE 0x20a8
+#define R300_VAP_VPORT_ZOFFSET 0x20ac
+
+#define R300_VAP_VTE_CNTL 0x20b0
+#define R300_SE_VTE_CNTL R300_VAP_VTE_CNTL
+# define R300_VPORT_X_SCALE_ENA (1 << 0)
+# define R300_VPORT_X_OFFSET_ENA (1 << 1)
+# define R300_VPORT_Y_SCALE_ENA (1 << 2)
+# define R300_VPORT_Y_OFFSET_ENA (1 << 3)
+# define R300_VPORT_Z_SCALE_ENA (1 << 4)
+# define R300_VPORT_Z_OFFSET_ENA (1 << 5)
+# define R300_VTX_XY_FMT (1 << 8)
+# define R300_VTX_Z_FMT (1 << 9)
+# define R300_VTX_W0_FMT (1 << 10)
+# define R300_SERIAL_PROC_ENA (1 << 11)
#define R300_VAP_VTX_SIZE 0x20b4
@@ -326,6 +334,14 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
# define R300_WRITE_ENA_Z 4
# define R300_WRITE_ENA_W 8
# define R300_SWIZZLE1_SHIFT 16
+
+# define R300_VAP_SWIZZLE_XYZW \
+ ((R300_SWIZZLE_SELECT_X << R300_SWIZZLE_SELECT_X_SHIFT) | \
+ (R300_SWIZZLE_SELECT_Y << R300_SWIZZLE_SELECT_Y_SHIFT) | \
+ (R300_SWIZZLE_SELECT_Z << R300_SWIZZLE_SELECT_Z_SHIFT) | \
+ (R300_SWIZZLE_SELECT_W << R300_SWIZZLE_SELECT_W_SHIFT) | \
+ (0xf << R300_WRITE_ENA_SHIFT))
+
#define R300_VAP_PROG_STREAM_CNTL_EXT_1 0x21e4
#define R300_VAP_PROG_STREAM_CNTL_EXT_2 0x21e8
#define R300_VAP_PROG_STREAM_CNTL_EXT_3 0x21ec
@@ -732,8 +748,12 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
#define R500_RS_IP_TEX_PTR_Q_SHIFT 18
#define R500_RS_IP_COL_PTR_SHIFT 24
#define R500_RS_IP_COL_FMT_SHIFT 27
-# define R500_RS_COL_PTR(x) (x << 24)
-# define R500_RS_COL_FMT(x) (x << 27)
+# define R500_RS_SEL_S(x) ((x) << 0)
+# define R500_RS_SEL_T(x) ((x) << 6)
+# define R500_RS_SEL_R(x) ((x) << 12)
+# define R500_RS_SEL_Q(x) ((x) << 18)
+# define R500_RS_COL_PTR(x) ((x) << 24)
+# define R500_RS_COL_FMT(x) ((x) << 27)
/* gap */
#define R500_RS_IP_OFFSET_DIS (0 << 31)
#define R500_RS_IP_OFFSET_EN (1 << 31)
@@ -1019,20 +1039,27 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
# define R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_THIRD (2 << 16)
# define R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST (3 << 16)
-/** TODO: might be candidate for removal */
-# define R300_RE_SHADE_MODEL_SMOOTH ( \
- R300_GA_COLOR_CONTROL_RGB0_SHADING_GOURAUD | R300_GA_COLOR_CONTROL_ALPHA0_SHADING_GOURAUD | \
- R300_GA_COLOR_CONTROL_RGB1_SHADING_GOURAUD | R300_GA_COLOR_CONTROL_ALPHA1_SHADING_GOURAUD | \
- R300_GA_COLOR_CONTROL_RGB2_SHADING_GOURAUD | R300_GA_COLOR_CONTROL_ALPHA2_SHADING_GOURAUD | \
- R300_GA_COLOR_CONTROL_RGB3_SHADING_GOURAUD | R300_GA_COLOR_CONTROL_ALPHA3_SHADING_GOURAUD | \
- R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST )
-/** TODO: might be candidate for removal, the GOURAUD stuff also looks buggy to me */
-# define R300_RE_SHADE_MODEL_FLAT ( \
- R300_GA_COLOR_CONTROL_RGB0_SHADING_FLAT | R300_GA_COLOR_CONTROL_ALPHA0_SHADING_FLAT | \
- R300_GA_COLOR_CONTROL_RGB1_SHADING_FLAT | R300_GA_COLOR_CONTROL_ALPHA1_SHADING_GOURAUD | \
- R300_GA_COLOR_CONTROL_RGB2_SHADING_FLAT | R300_GA_COLOR_CONTROL_ALPHA2_SHADING_FLAT | \
- R300_GA_COLOR_CONTROL_RGB3_SHADING_FLAT | R300_GA_COLOR_CONTROL_ALPHA3_SHADING_GOURAUD | \
- R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST )
+# define R300_SHADE_MODEL_FLAT ( \
+ R300_GA_COLOR_CONTROL_RGB0_SHADING_FLAT | \
+ R300_GA_COLOR_CONTROL_ALPHA0_SHADING_FLAT | \
+ R300_GA_COLOR_CONTROL_RGB1_SHADING_FLAT | \
+ R300_GA_COLOR_CONTROL_ALPHA1_SHADING_FLAT | \
+ R300_GA_COLOR_CONTROL_RGB2_SHADING_FLAT | \
+ R300_GA_COLOR_CONTROL_ALPHA2_SHADING_FLAT | \
+ R300_GA_COLOR_CONTROL_RGB3_SHADING_FLAT | \
+ R300_GA_COLOR_CONTROL_ALPHA3_SHADING_FLAT | \
+ R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST )
+
+# define R300_SHADE_MODEL_SMOOTH ( \
+ R300_GA_COLOR_CONTROL_RGB0_SHADING_GOURAUD | \
+ R300_GA_COLOR_CONTROL_ALPHA0_SHADING_GOURAUD | \
+ R300_GA_COLOR_CONTROL_RGB1_SHADING_GOURAUD | \
+ R300_GA_COLOR_CONTROL_ALPHA1_SHADING_GOURAUD | \
+ R300_GA_COLOR_CONTROL_RGB2_SHADING_GOURAUD | \
+ R300_GA_COLOR_CONTROL_ALPHA2_SHADING_GOURAUD | \
+ R300_GA_COLOR_CONTROL_RGB3_SHADING_GOURAUD | \
+ R300_GA_COLOR_CONTROL_ALPHA3_SHADING_GOURAUD | \
+ R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST )
/* Specifies red & green components of fill color -- S312 format -- Backwards comp. */
#define R300_GA_SOLID_RG 0x427c
@@ -1146,6 +1173,9 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
# define R300_W_ADDR_MASK 0x0003f000
# define R300_HIRES_DIS (0 << 18)
# define R300_HIRES_EN (1 << 18)
+# define R300_IT_COUNT(x) ((x) << 0)
+# define R300_IC_COUNT(x) ((x) << 7)
+# define R300_W_COUNT(x) ((x) << 12)
#define R300_RS_INST_COUNT 0x4304
# define R300_RS_INST_COUNT_SHIFT 0
@@ -1175,8 +1205,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
# define R300_RS_INTERP_SRC_SHIFT 2 /* TODO: check for removal */
# define R300_RS_INTERP_SRC_MASK (7 << 2) /* TODO: check for removal */
# define R300_RS_TEX_PTR(x) (x << 0)
-# define R300_RS_COL_PTR(x) (x << 6)
-# define R300_RS_COL_FMT(x) (x << 9)
+# define R300_RS_COL_PTR(x) ((x) << 6)
+# define R300_RS_COL_FMT(x) ((x) << 9)
# define R300_RS_COL_FMT_RGBA 0
# define R300_RS_COL_FMT_RGB0 1
# define R300_RS_COL_FMT_RGB1 2
@@ -1186,10 +1216,10 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
# define R300_RS_COL_FMT_111A 8
# define R300_RS_COL_FMT_1110 9
# define R300_RS_COL_FMT_1111 10
-# define R300_RS_SEL_S(x) (x << 13)
-# define R300_RS_SEL_T(x) (x << 16)
-# define R300_RS_SEL_R(x) (x << 19)
-# define R300_RS_SEL_Q(x) (x << 22)
+# define R300_RS_SEL_S(x) ((x) << 13)
+# define R300_RS_SEL_T(x) ((x) << 16)
+# define R300_RS_SEL_R(x) ((x) << 19)
+# define R300_RS_SEL_Q(x) ((x) << 22)
# define R300_RS_SEL_C0 0
# define R300_RS_SEL_C1 1
# define R300_RS_SEL_C2 2
@@ -1216,14 +1246,18 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
#define R500_RS_INST_14 0x4358
#define R500_RS_INST_15 0x435c
#define R500_RS_INST_TEX_ID_SHIFT 0
+# define R500_RS_INST_TEX_ID(x) ((x) << 0)
#define R500_RS_INST_TEX_CN_WRITE (1 << 4)
#define R500_RS_INST_TEX_ADDR_SHIFT 5
+# define R500_RS_INST_TEX_ADDR(x) ((x) << 0)
#define R500_RS_INST_COL_ID_SHIFT 12
+# define R500_RS_INST_COL_ID(x) ((x) << 12)
#define R500_RS_INST_COL_CN_NO_WRITE (0 << 16)
#define R500_RS_INST_COL_CN_WRITE (1 << 16)
#define R500_RS_INST_COL_CN_WRITE_FBUFFER (2 << 16)
#define R500_RS_INST_COL_CN_WRITE_BACKFACE (3 << 16)
#define R500_RS_INST_COL_ADDR_SHIFT 18
+# define R500_RS_INST_COL_ADDR(x) ((x) << 18)
#define R500_RS_INST_TEX_ADJ (1 << 25)
#define R500_RS_INST_W_CN (1 << 26)
@@ -1240,9 +1274,11 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
#define R300_RS_INST_7 0x434C
# define R300_RS_INST_TEX_ID(x) ((x) << 0)
# define R300_RS_INST_TEX_CN_WRITE (1 << 3)
+# define R300_RS_INST_TEX_ADDR(x) ((x) << 6)
# define R300_RS_INST_TEX_ADDR_SHIFT 6
# define R300_RS_INST_COL_ID(x) ((x) << 11)
# define R300_RS_INST_COL_CN_WRITE (1 << 14)
+# define R300_RS_INST_COL_ADDR(x) ((x) << 17)
# define R300_RS_INST_COL_ADDR_SHIFT 17
# define R300_RS_INST_TEX_ADJ (1 << 22)
# define R300_RS_COL_BIAS_UNUSED_SHIFT 23
@@ -1411,18 +1447,21 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
# define R500_MACRO_SWITCH (1<<22)
# define R500_BORDER_FIX (1<<31)
-#define R300_TX_SIZE_0 0x4480
+#define R300_TX_FORMAT0_0 0x4480
# define R300_TX_WIDTHMASK_SHIFT 0
# define R300_TX_WIDTHMASK_MASK (2047 << 0)
# define R300_TX_HEIGHTMASK_SHIFT 11
# define R300_TX_HEIGHTMASK_MASK (2047 << 11)
-# define R300_TX_DEPTHMASK_SHIFT 22
-# define R300_TX_DEPTHMASK_MASK (0xf << 22)
+# define R300_TX_DEPTHMASK_SHIFT 22
+# define R300_TX_DEPTHMASK_MASK (0xf << 22)
# define R300_TX_MAX_MIP_LEVEL_SHIFT 26
# define R300_TX_MAX_MIP_LEVEL_MASK (0xf << 26)
-# define R300_TX_SIZE_PROJECTED (1<<30)
-# define R300_TX_SIZE_TXPITCH_EN (1<<31)
-#define R300_TX_FORMAT_0 0x44C0
+# define R300_TX_SIZE_PROJECTED (1 << 30)
+# define R300_TX_PITCH_EN (1 << 31)
+# define R300_TX_WIDTH(x) ((x) << 0)
+# define R300_TX_HEIGHT(x) ((x) << 11)
+
+#define R300_TX_FORMAT1_0 0x44C0
/* The interpretation of the format word by Wladimir van der Laan */
/* The X, Y, Z and W refer to the layout of the components.
They are given meanings as R, G, B and Alpha by the swizzle
@@ -1708,7 +1747,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
# define R300_C3_SEL_R (1 << 14)
# define R300_C3_SEL_G (2 << 14)
# define R300_C3_SEL_B (3 << 14)
-# define R300_OUT_SIGN(x) (x << 16)
+# define R300_OUT_SIGN(x) ((x) << 16)
+# define R500_ROUND_ADJ (1 << 20)
/* ALU
* The ALU instructions register blocks are enumerated according to the order
@@ -1795,6 +1835,10 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
# define R300_ALU_DSTC_OUTPUT_X (1 << 26)
# define R300_ALU_DSTC_OUTPUT_Y (1 << 27)
# define R300_ALU_DSTC_OUTPUT_Z (1 << 28)
+# define R300_ALU_DSTC_OUTPUT_XYZ (7 << 26)
+# define R300_RGB_ADDR0(x) ((x) << 0)
+# define R300_RGB_ADDR1(x) ((x) << 6)
+# define R300_RGB_ADDR2(x) ((x) << 12)
#define R300_US_ALU_ALPHA_ADDR_0 0x47C0
# define R300_ALU_SRC0A_SHIFT 0
@@ -1812,6 +1856,9 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
# define R300_ALU_DSTA_REG (1 << 23)
# define R300_ALU_DSTA_OUTPUT (1 << 24)
# define R300_ALU_DSTA_DEPTH (1 << 27)
+# define R300_ALPHA_ADDR0(x) ((x) << 0)
+# define R300_ALPHA_ADDR1(x) ((x) << 6)
+# define R300_ALPHA_ADDR2(x) ((x) << 12)
#define R300_US_ALU_RGB_INST_0 0x48C0
# define R300_ALU_ARGC_SRC0C_XYZ 0
@@ -1846,6 +1893,9 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
# define R300_ALU_ARGC_SRC0CA_WZY 29
# define R300_ALU_ARGC_SRC1CA_WZY 30
# define R300_ALU_ARGC_SRC2CA_WZY 31
+# define R300_RGB_SWIZA(x) ((x) << 0)
+# define R300_RGB_SWIZB(x) ((x) << 7)
+# define R300_RGB_SWIZC(x) ((x) << 14)
# define R300_ALU_ARG0C_SHIFT 0
# define R300_ALU_ARG0C_MASK (31 << 0)
@@ -1909,10 +1959,13 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
# define R300_ALU_ARGA_SRCP_Y 13
# define R300_ALU_ARGA_SRCP_Z 14
# define R300_ALU_ARGA_SRCP_W 15
-
# define R300_ALU_ARGA_ZERO 16
# define R300_ALU_ARGA_ONE 17
# define R300_ALU_ARGA_HALF 18
+# define R300_ALPHA_SWIZA(x) ((x) << 0)
+# define R300_ALPHA_SWIZB(x) ((x) << 7)
+# define R300_ALPHA_SWIZC(x) ((x) << 14)
+
# define R300_ALU_ARG0A_SHIFT 0
# define R300_ALU_ARG0A_MASK (31 << 0)
# define R300_ALU_ARG0A_NOP (0 << 5)
@@ -2731,7 +2784,7 @@ enum {
# define R500_ALPHA_OP_COS 13
# define R500_ALPHA_OP_MDH 14
# define R500_ALPHA_OP_MDV 15
-# define R500_ALPHA_ADDRD(x) (x << 4)
+# define R500_ALPHA_ADDRD(x) ((x) << 4)
# define R500_ALPHA_ADDRD_REL (1 << 11)
# define R500_ALPHA_SEL_A_SHIFT 12
# define R500_ALPHA_SEL_A_SRC0 (0 << 12)
@@ -2775,16 +2828,16 @@ enum {
# define R500_ALPHA_OMOD_DIV_4 (5 << 26)
# define R500_ALPHA_OMOD_DIV_8 (6 << 26)
# define R500_ALPHA_OMOD_DISABLE (7 << 26)
-# define R500_ALPHA_TARGET(x) (x << 29)
+# define R500_ALPHA_TARGET(x) ((x) << 29)
# define R500_ALPHA_W_OMASK (1 << 31)
#define R500_US_ALU_ALPHA_ADDR_0 0x9800
-# define R500_ALPHA_ADDR0(x) (x << 0)
+# define R500_ALPHA_ADDR0(x) ((x) << 0)
# define R500_ALPHA_ADDR0_CONST (1 << 8)
# define R500_ALPHA_ADDR0_REL (1 << 9)
-# define R500_ALPHA_ADDR1(x) (x << 10)
+# define R500_ALPHA_ADDR1(x) ((x) << 10)
# define R500_ALPHA_ADDR1_CONST (1 << 18)
# define R500_ALPHA_ADDR1_REL (1 << 19)
-# define R500_ALPHA_ADDR2(x) (x << 20)
+# define R500_ALPHA_ADDR2(x) ((x) << 20)
# define R500_ALPHA_ADDR2_CONST (1 << 28)
# define R500_ALPHA_ADDR2_REL (1 << 29)
# define R500_ALPHA_SRCP_OP_1_MINUS_2A0 (0 << 30)
@@ -2805,7 +2858,7 @@ enum {
# define R500_ALU_RGBA_OP_SOP (10 << 0)
# define R500_ALU_RGBA_OP_MDH (11 << 0)
# define R500_ALU_RGBA_OP_MDV (12 << 0)
-# define R500_ALU_RGBA_ADDRD(x) (x << 4)
+# define R500_ALU_RGBA_ADDRD(x) ((x) << 4)
# define R500_ALU_RGBA_ADDRD_REL (1 << 11)
# define R500_ALU_RGBA_SEL_C_SHIFT 12
# define R500_ALU_RGBA_SEL_C_SRC0 (0 << 12)
@@ -2932,16 +2985,16 @@ enum {
# define R500_ALU_RGB_OMOD_DIV_4 (5 << 26)
# define R500_ALU_RGB_OMOD_DIV_8 (6 << 26)
# define R500_ALU_RGB_OMOD_DISABLE (7 << 26)
-# define R500_ALU_RGB_TARGET(x) (x << 29)
+# define R500_ALU_RGB_TARGET(x) ((x) << 29)
# define R500_ALU_RGB_WMASK (1 << 31)
#define R500_US_ALU_RGB_ADDR_0 0x9000
-# define R500_RGB_ADDR0(x) (x << 0)
+# define R500_RGB_ADDR0(x) ((x) << 0)
# define R500_RGB_ADDR0_CONST (1 << 8)
# define R500_RGB_ADDR0_REL (1 << 9)
-# define R500_RGB_ADDR1(x) (x << 10)
+# define R500_RGB_ADDR1(x) ((x) << 10)
# define R500_RGB_ADDR1_CONST (1 << 18)
# define R500_RGB_ADDR1_REL (1 << 19)
-# define R500_RGB_ADDR2(x) (x << 20)
+# define R500_RGB_ADDR2(x) ((x) << 20)
# define R500_RGB_ADDR2_CONST (1 << 28)
# define R500_RGB_ADDR2_REL (1 << 29)
# define R500_RGB_SRCP_OP_1_MINUS_2RGB0 (0 << 30)
@@ -2973,6 +3026,7 @@ enum {
# define R500_INST_RGB_OMASK_R (1 << 15)
# define R500_INST_RGB_OMASK_G (1 << 16)
# define R500_INST_RGB_OMASK_B (1 << 17)
+# define R500_INST_RGB_OMASK_RGB (7 << 15)
# define R500_INST_ALPHA_OMASK (1 << 18)
# define R500_INST_RGB_CLAMP (1 << 19)
# define R500_INST_ALPHA_CLAMP (1 << 20)
@@ -2996,19 +3050,19 @@ enum {
/* note that these are 8 bit lengths, despite the offsets, at least for R500 */
#define R500_US_CODE_ADDR 0x4630
-# define R500_US_CODE_START_ADDR(x) (x << 0)
-# define R500_US_CODE_END_ADDR(x) (x << 16)
+# define R500_US_CODE_START_ADDR(x) ((x) << 0)
+# define R500_US_CODE_END_ADDR(x) ((x) << 16)
#define R500_US_CODE_OFFSET 0x4638
-# define R500_US_CODE_OFFSET_ADDR(x) (x << 0)
+# define R500_US_CODE_OFFSET_ADDR(x) ((x) << 0)
#define R500_US_CODE_RANGE 0x4634
-# define R500_US_CODE_RANGE_ADDR(x) (x << 0)
-# define R500_US_CODE_RANGE_SIZE(x) (x << 16)
+# define R500_US_CODE_RANGE_ADDR(x) ((x) << 0)
+# define R500_US_CODE_RANGE_SIZE(x) ((x) << 16)
#define R500_US_CONFIG 0x4600
# define R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO (1 << 1)
#define R500_US_FC_ADDR_0 0xa000
-# define R500_FC_BOOL_ADDR(x) (x << 0)
-# define R500_FC_INT_ADDR(x) (x << 8)
-# define R500_FC_JUMP_ADDR(x) (x << 16)
+# define R500_FC_BOOL_ADDR(x) ((x) << 0)
+# define R500_FC_INT_ADDR(x) ((x) << 8)
+# define R500_FC_JUMP_ADDR(x) ((x) << 16)
# define R500_FC_JUMP_GLOBAL (1 << 31)
#define R500_US_FC_BOOL_CONST 0x4620
# define R500_FC_KBOOL(x) (x)
@@ -3029,8 +3083,8 @@ enum {
# define R500_FC_A_OP_NONE (0 << 6)
# define R500_FC_A_OP_POP (1 << 6)
# define R500_FC_A_OP_PUSH (2 << 6)
-# define R500_FC_JUMP_FUNC(x) (x << 8)
-# define R500_FC_B_POP_CNT(x) (x << 16)
+# define R500_FC_JUMP_FUNC(x) ((x) << 8)
+# define R500_FC_B_POP_CNT(x) ((x) << 16)
# define R500_FC_B_OP0_NONE (0 << 24)
# define R500_FC_B_OP0_DECR (1 << 24)
# define R500_FC_B_OP0_INCR (2 << 24)
@@ -3039,60 +3093,18 @@ enum {
# define R500_FC_B_OP1_INCR (2 << 26)
# define R500_FC_IGNORE_UNCOVERED (1 << 28)
#define R500_US_FC_INT_CONST_0 0x4c00
-# define R500_FC_INT_CONST_KR(x) (x << 0)
-# define R500_FC_INT_CONST_KG(x) (x << 8)
-# define R500_FC_INT_CONST_KB(x) (x << 16)
+# define R500_FC_INT_CONST_KR(x) ((x) << 0)
+# define R500_FC_INT_CONST_KG(x) ((x) << 8)
+# define R500_FC_INT_CONST_KB(x) ((x) << 16)
/* _0 through _15 */
#define R500_US_FORMAT0_0 0x4640
-# define R500_FORMAT_TXWIDTH(x) (x << 0)
-# define R500_FORMAT_TXHEIGHT(x) (x << 11)
-# define R500_FORMAT_TXDEPTH(x) (x << 22)
-/* _0 through _3 */
-#define R500_US_OUT_FMT_0 0x46A4
-# define R500_OUT_FMT_C4_8 (0 << 0)
-# define R500_OUT_FMT_C4_10 (1 << 0)
-# define R500_OUT_FMT_C4_10_GAMMA (2 << 0)
-# define R500_OUT_FMT_C_16 (3 << 0)
-# define R500_OUT_FMT_C2_16 (4 << 0)
-# define R500_OUT_FMT_C4_16 (5 << 0)
-# define R500_OUT_FMT_C_16_MPEG (6 << 0)
-# define R500_OUT_FMT_C2_16_MPEG (7 << 0)
-# define R500_OUT_FMT_C2_4 (8 << 0)
-# define R500_OUT_FMT_C_3_3_2 (9 << 0)
-# define R500_OUT_FMT_C_6_5_6 (10 << 0)
-# define R500_OUT_FMT_C_11_11_10 (11 << 0)
-# define R500_OUT_FMT_C_10_11_11 (12 << 0)
-# define R500_OUT_FMT_C_2_10_10_10 (13 << 0)
-/* #define R500_OUT_FMT_RESERVED (14 << 0) */
-# define R500_OUT_FMT_UNUSED (15 << 0)
-# define R500_OUT_FMT_C_16_FP (16 << 0)
-# define R500_OUT_FMT_C2_16_FP (17 << 0)
-# define R500_OUT_FMT_C4_16_FP (18 << 0)
-# define R500_OUT_FMT_C_32_FP (19 << 0)
-# define R500_OUT_FMT_C2_32_FP (20 << 0)
-# define R500_OUT_FMT_C4_32_FP (21 << 0)
-# define R500_C0_SEL_A (0 << 8)
-# define R500_C0_SEL_R (1 << 8)
-# define R500_C0_SEL_G (2 << 8)
-# define R500_C0_SEL_B (3 << 8)
-# define R500_C1_SEL_A (0 << 10)
-# define R500_C1_SEL_R (1 << 10)
-# define R500_C1_SEL_G (2 << 10)
-# define R500_C1_SEL_B (3 << 10)
-# define R500_C2_SEL_A (0 << 12)
-# define R500_C2_SEL_R (1 << 12)
-# define R500_C2_SEL_G (2 << 12)
-# define R500_C2_SEL_B (3 << 12)
-# define R500_C3_SEL_A (0 << 14)
-# define R500_C3_SEL_R (1 << 14)
-# define R500_C3_SEL_G (2 << 14)
-# define R500_C3_SEL_B (3 << 14)
-# define R500_OUT_SIGN(x) (x << 16)
-# define R500_ROUND_ADJ (1 << 20)
+# define R500_FORMAT_TXWIDTH(x) ((x) << 0)
+# define R500_FORMAT_TXHEIGHT(x) ((x) << 11)
+# define R500_FORMAT_TXDEPTH(x) ((x) << 22)
#define R500_US_PIXSIZE 0x4604
# define R500_PIX_SIZE(x) (x)
#define R500_US_TEX_ADDR_0 0x9800
-# define R500_TEX_SRC_ADDR(x) (x << 0)
+# define R500_TEX_SRC_ADDR(x) ((x) << 0)
# define R500_TEX_SRC_ADDR_REL (1 << 7)
# define R500_TEX_SRC_S_SWIZ_R (0 << 8)
# define R500_TEX_SRC_S_SWIZ_G (1 << 8)
@@ -3110,7 +3122,7 @@ enum {
# define R500_TEX_SRC_Q_SWIZ_G (1 << 14)
# define R500_TEX_SRC_Q_SWIZ_B (2 << 14)
# define R500_TEX_SRC_Q_SWIZ_A (3 << 14)
-# define R500_TEX_DST_ADDR(x) (x << 16)
+# define R500_TEX_DST_ADDR(x) ((x) << 16)
# define R500_TEX_DST_ADDR_REL (1 << 23)
# define R500_TEX_DST_R_SWIZ_R (0 << 24)
# define R500_TEX_DST_R_SWIZ_G (1 << 24)
@@ -3129,7 +3141,7 @@ enum {
# define R500_TEX_DST_A_SWIZ_B (2 << 30)
# define R500_TEX_DST_A_SWIZ_A (3 << 30)
#define R500_US_TEX_ADDR_DXDY_0 0xa000
-# define R500_DX_ADDR(x) (x << 0)
+# define R500_DX_ADDR(x) ((x) << 0)
# define R500_DX_ADDR_REL (1 << 7)
# define R500_DX_S_SWIZ_R (0 << 8)
# define R500_DX_S_SWIZ_G (1 << 8)
@@ -3147,7 +3159,7 @@ enum {
# define R500_DX_Q_SWIZ_G (1 << 14)
# define R500_DX_Q_SWIZ_B (2 << 14)
# define R500_DX_Q_SWIZ_A (3 << 14)
-# define R500_DY_ADDR(x) (x << 16)
+# define R500_DY_ADDR(x) ((x) << 16)
# define R500_DY_ADDR_REL (1 << 17)
# define R500_DY_S_SWIZ_R (0 << 24)
# define R500_DY_S_SWIZ_G (1 << 24)
@@ -3166,7 +3178,7 @@ enum {
# define R500_DY_Q_SWIZ_B (2 << 30)
# define R500_DY_Q_SWIZ_A (3 << 30)
#define R500_US_TEX_INST_0 0x9000
-# define R500_TEX_ID(x) (x << 16)
+# define R500_TEX_ID(x) ((x) << 16)
# define R500_TEX_INST_NOP (0 << 22)
# define R500_TEX_INST_LD (1 << 22)
# define R500_TEX_INST_TEXKILL (2 << 22)
@@ -3227,9 +3239,9 @@ enum {
#define R300_PACKET3_3D_LOAD_VBPNTR 0x00002F00
#define R300_PACKET3_INDX_BUFFER 0x00003300
-# define R300_EB_UNK1_SHIFT 24
-# define R300_EB_UNK1 (0x80<<24)
-# define R300_EB_UNK2 0x0810
+# define R300_INDX_BUFFER_DST_SHIFT 0
+# define R300_INDX_BUFFER_SKIP_SHIFT 16
+# define R300_INDX_BUFFER_ONE_REG_WR (1<<31)
/* Same as R300_PACKET3_3D_DRAW_VBUF but without VAP_VTX_FMT */
#define R300_PACKET3_3D_DRAW_VBUF_2 0x00003400