nouveau: make nv20 use NV{20,25}TCL objects

Up till now, nv20 driver has been using NV10TCL, and being
really an nv10 driver. That has changed.

Signed-off-by: Pekka Paalanen <pq@iki.fi>

6 files changed, 367 insertions, 252 deletions

diff --git a/src/gallium/drivers/nv20/nv20_context.c b/src/gallium/drivers/nv20/nv20_context.c
index ba2f0bf1e8..9a17f4af57 100644
--- a/src/gallium/drivers/nv20/nv20_context.c
+++ b/src/gallium/drivers/nv20/nv20_context.c
@@ -33,217 +33,340 @@ static void nv20_init_hwctx(struct nv20_context *nv20)
 	struct nouveau_winsys *nvws = screen->nvws;
 	int i;
 	float projectionmatrix[16];
+	const boolean is_nv25tcl = (nv20->screen->kelvin->grclass == NV25TCL);
 
-	BEGIN_RING(kelvin, NV10TCL_DMA_NOTIFY, 1);
+	BEGIN_RING(kelvin, NV20TCL_DMA_NOTIFY, 1);
 	OUT_RING  (screen->sync->handle);
-	BEGIN_RING(kelvin, NV10TCL_DMA_IN_MEMORY0, 2);
-	OUT_RING  (nvws->channel->vram->handle);
-	OUT_RING  (nvws->channel->gart->handle);
-	BEGIN_RING(kelvin, NV10TCL_DMA_IN_MEMORY2, 2);
+	BEGIN_RING(kelvin, NV20TCL_DMA_TEXTURE0, 2);
 	OUT_RING  (nvws->channel->vram->handle);
+	OUT_RING  (nvws->channel->gart->handle); /* TEXTURE1 */
+	BEGIN_RING(kelvin, NV20TCL_DMA_COLOR, 2);
 	OUT_RING  (nvws->channel->vram->handle);
+	OUT_RING  (nvws->channel->vram->handle); /* ZETA */
 
-	BEGIN_RING(kelvin, NV10TCL_NOP, 1);
-	OUT_RING  (0);
+	BEGIN_RING(kelvin, NV20TCL_DMA_QUERY, 1);
+	OUT_RING  (0); /* renouveau: beef0351, unique */
 
-	BEGIN_RING(kelvin, NV10TCL_RT_HORIZ, 2);
+	BEGIN_RING(kelvin, NV20TCL_RT_HORIZ, 2);
 	OUT_RING  (0);
 	OUT_RING  (0);
 
-	BEGIN_RING(kelvin, NV10TCL_VIEWPORT_CLIP_HORIZ(0), 1);
-	OUT_RING  ((0x7ff<<16)|0x800);
-	BEGIN_RING(kelvin, NV10TCL_VIEWPORT_CLIP_VERT(0), 1);
-	OUT_RING  ((0x7ff<<16)|0x800);
+	BEGIN_RING(kelvin, NV20TCL_VIEWPORT_CLIP_HORIZ(0), 1);
+	OUT_RING  ((0xfff << 16) | 0x0);
+	BEGIN_RING(kelvin, NV20TCL_VIEWPORT_CLIP_VERT(0), 1);
+	OUT_RING  ((0xfff << 16) | 0x0);
 
-	for (i=1;i<8;i++) {
-		BEGIN_RING(kelvin, NV10TCL_VIEWPORT_CLIP_HORIZ(i), 1);
+	for (i = 1; i < NV20TCL_VIEWPORT_CLIP_HORIZ__SIZE; i++) {
+		BEGIN_RING(kelvin, NV20TCL_VIEWPORT_CLIP_HORIZ(i), 1);
 		OUT_RING  (0);
-		BEGIN_RING(kelvin, NV10TCL_VIEWPORT_CLIP_VERT(i), 1);
+		BEGIN_RING(kelvin, NV20TCL_VIEWPORT_CLIP_VERT(i), 1);
 		OUT_RING  (0);
 	}
 
+	BEGIN_RING(kelvin, NV20TCL_VIEWPORT_CLIP_MODE, 1);
+	OUT_RING  (0);
+
+	BEGIN_RING(kelvin, 0x17e0, 3);
+	OUT_RINGf (0.0);
+	OUT_RINGf (0.0);
+	OUT_RINGf (1.0);
+
+	if (is_nv25tcl) {
+		BEGIN_RING(kelvin, NV20TCL_TX_RCOMP, 1);
+		OUT_RING  (NV20TCL_TX_RCOMP_LEQUAL | 0xdb0);
+	} else {
+		BEGIN_RING(kelvin, 0x1e68, 1);
+		OUT_RING  (0x4b800000); /* 16777216.000000 */
+		BEGIN_RING(kelvin, NV20TCL_TX_RCOMP, 1);
+		OUT_RING  (NV20TCL_TX_RCOMP_LEQUAL);
+	}
+
 	BEGIN_RING(kelvin, 0x290, 1);
-	OUT_RING  ((0x10<<16)|1);
-	BEGIN_RING(kelvin, 0x3f4, 1);
+	OUT_RING  ((0x10 << 16) | 1);
+	BEGIN_RING(kelvin, 0x9fc, 1);
 	OUT_RING  (0);
+	BEGIN_RING(kelvin, 0x1d80, 1);
+	OUT_RING  (1);
+	BEGIN_RING(kelvin, 0x9f8, 1);
+	OUT_RING  (4);
+	BEGIN_RING(kelvin, 0x17ec, 3);
+	OUT_RINGf (0.0);
+	OUT_RINGf (1.0);
+	OUT_RINGf (0.0);
+
+	if (is_nv25tcl) {
+		BEGIN_RING(kelvin, 0x1d88, 1);
+		OUT_RING  (3);
 
-	BEGIN_RING(kelvin, NV10TCL_NOP, 1);
+		BEGIN_RING(kelvin, NV25TCL_DMA_IN_MEMORY9, 1);
+		OUT_RING  (nvws->channel->vram->handle);
+		BEGIN_RING(kelvin, NV25TCL_DMA_IN_MEMORY8, 1);
+		OUT_RING  (nvws->channel->vram->handle);
+	}
+	BEGIN_RING(kelvin, NV20TCL_DMA_FENCE, 1);
+	OUT_RING  (0);	/* renouveau: beef1e10 */
+
+	BEGIN_RING(kelvin, 0x1e98, 1);
 	OUT_RING  (0);
+#if 0
+	if (is_nv25tcl) {
+		BEGIN_RING(NvSub3D, NV25TCL_DMA_IN_MEMORY4, 2);
+		OUT_RING  (NvDmaTT);	/* renouveau: beef0202 */
+		OUT_RING  (NvDmaFB);	/* renouveau: beef0201 */
 
-	if (nv20->screen->kelvin->grclass != NV10TCL) {
-		/* For nv11, nv17 */
-		BEGIN_RING(kelvin, 0x120, 3);
-		OUT_RING  (0);
-		OUT_RING  (1);
-		OUT_RING  (2);
+		BEGIN_RING(NvSub3D, NV20TCL_DMA_TEXTURE1, 1);
+		OUT_RING  (NvDmaTT);	/* renouveau: beef0202 */
+	}
+#endif
+	BEGIN_RING(kelvin, NV20TCL_NOTIFY, 1);
+	OUT_RING  (0);
 
-		BEGIN_RING(kelvin, NV10TCL_NOP, 1);
+	BEGIN_RING(kelvin, 0x120, 3);
+	OUT_RING  (0);
+	OUT_RING  (1);
+	OUT_RING  (2);
+
+/* error: ILLEGAL_MTHD, PROTECTION_FAULT
+	BEGIN_RING(kelvin, NV20TCL_VIEWPORT_TRANSLATE_X, 4);
+	OUT_RINGf (0.0);
+	OUT_RINGf (512.0);
+	OUT_RINGf (0.0);
+	OUT_RINGf (0.0);
+*/
+
+	if (is_nv25tcl) {
+		BEGIN_RING(kelvin, 0x022c, 2);
+		OUT_RING  (0x280);
+		OUT_RING  (0x07d28000);
+	}
+
+/* * illegal method, protection fault
+	BEGIN_RING(NvSub3D, 0x1c2c, 1);
+	OUT_RING  (0); */
+
+	if (is_nv25tcl) {
+		BEGIN_RING(kelvin, 0x1da4, 1);
 		OUT_RING  (0);
 	}
 
-	BEGIN_RING(kelvin, NV10TCL_NOP, 1);
-	OUT_RING  (0);
+/* * crashes with illegal method, protection fault
+	BEGIN_RING(NvSub3D, 0x1c18, 1);
+	OUT_RING  (0x200); */
 
-	/* Set state */
-	BEGIN_RING(kelvin, NV10TCL_FOG_ENABLE, 1);
+	BEGIN_RING(kelvin, NV20TCL_RT_HORIZ, 2);
+	OUT_RING  ((0 << 16) | 0);
+	OUT_RING  ((0 << 16) | 0);
+
+	/* *** Set state *** */
+
+	BEGIN_RING(kelvin, NV20TCL_ALPHA_FUNC_ENABLE, 1);
 	OUT_RING  (0);
-	BEGIN_RING(kelvin, NV10TCL_ALPHA_FUNC_ENABLE, 1);
+	BEGIN_RING(kelvin, NV20TCL_ALPHA_FUNC_FUNC, 2);
+	OUT_RING  (NV20TCL_ALPHA_FUNC_FUNC_ALWAYS);
+	OUT_RING  (0);			/* NV20TCL_ALPHA_FUNC_REF */
+
+	for (i = 0; i < NV20TCL_TX_ENABLE__SIZE; ++i) {
+		BEGIN_RING(kelvin, NV20TCL_TX_ENABLE(i), 1);
+		OUT_RING  (0);
+	}
+	BEGIN_RING(kelvin, NV20TCL_TX_SHADER_OP, 1);
 	OUT_RING  (0);
-	BEGIN_RING(kelvin, NV10TCL_ALPHA_FUNC_FUNC, 2);
-	OUT_RING  (0x207);
+	BEGIN_RING(kelvin, NV20TCL_TX_SHADER_CULL_MODE, 1);
 	OUT_RING  (0);
-	BEGIN_RING(kelvin, NV10TCL_TX_ENABLE(0), 2);
+	BEGIN_RING(kelvin, NV20TCL_RC_IN_ALPHA(0), 4);
+	OUT_RING  (0x30d410d0);
 	OUT_RING  (0);
 	OUT_RING  (0);
-
-	BEGIN_RING(kelvin, NV10TCL_RC_IN_ALPHA(0), 12);
-	OUT_RING  (0x30141010);
 	OUT_RING  (0);
-	OUT_RING  (0x20040000);
+	BEGIN_RING(kelvin, NV20TCL_RC_OUT_RGB(0), 4);
+	OUT_RING  (0x00000c00);
 	OUT_RING  (0);
 	OUT_RING  (0);
 	OUT_RING  (0);
+	BEGIN_RING(kelvin, NV20TCL_RC_ENABLE, 1);
+	OUT_RING  (0x00011101);
+	BEGIN_RING(kelvin, NV20TCL_RC_FINAL0, 2);
+	OUT_RING  (0x130e0300);
+	OUT_RING  (0x0c091c80);
+	BEGIN_RING(kelvin, NV20TCL_RC_OUT_ALPHA(0), 4);
 	OUT_RING  (0x00000c00);
 	OUT_RING  (0);
-	OUT_RING  (0x00000c00);
-	OUT_RING  (0x18000000);
-	OUT_RING  (0x300e0300);
-	OUT_RING  (0x0c091c80);
-
-	BEGIN_RING(kelvin, NV10TCL_BLEND_FUNC_ENABLE, 1);
 	OUT_RING  (0);
-	BEGIN_RING(kelvin, NV10TCL_DITHER_ENABLE, 2);
-	OUT_RING  (1);
 	OUT_RING  (0);
-	BEGIN_RING(kelvin, NV10TCL_LINE_SMOOTH_ENABLE, 1);
+	BEGIN_RING(kelvin, NV20TCL_RC_IN_RGB(0), 4);
+	OUT_RING  (0x20c400c0);
 	OUT_RING  (0);
-	BEGIN_RING(kelvin, NV10TCL_VERTEX_WEIGHT_ENABLE, 2);
 	OUT_RING  (0);
 	OUT_RING  (0);
-	BEGIN_RING(kelvin, NV10TCL_BLEND_FUNC_SRC, 4);
-	OUT_RING  (1);
+	BEGIN_RING(kelvin, NV20TCL_RC_COLOR0, 2);
 	OUT_RING  (0);
 	OUT_RING  (0);
-	OUT_RING  (0x8006);
-	BEGIN_RING(kelvin, NV10TCL_STENCIL_MASK, 8);
-	OUT_RING  (0xff);
-	OUT_RING  (0x207);
+	BEGIN_RING(kelvin, NV20TCL_RC_CONSTANT_COLOR0(0), 4);
+	OUT_RING  (0x035125a0);
 	OUT_RING  (0);
-	OUT_RING  (0xff);
-	OUT_RING  (0x1e00);
-	OUT_RING  (0x1e00);
-	OUT_RING  (0x1e00);
-	OUT_RING  (0x1d01);
-	BEGIN_RING(kelvin, NV10TCL_NORMALIZE_ENABLE, 1);
+	OUT_RING  (0x40002000);
 	OUT_RING  (0);
-	BEGIN_RING(kelvin, NV10TCL_FOG_ENABLE, 2);
+	BEGIN_RING(kelvin, NV20TCL_MULTISAMPLE_CONTROL, 1);
+	OUT_RING  (0xffff0000);
+
+	BEGIN_RING(kelvin, NV20TCL_BLEND_FUNC_ENABLE, 1);
 	OUT_RING  (0);
+	BEGIN_RING(kelvin, NV20TCL_DITHER_ENABLE, 1);
 	OUT_RING  (0);
-	BEGIN_RING(kelvin, NV10TCL_LIGHT_MODEL, 1);
+	BEGIN_RING(kelvin, NV20TCL_STENCIL_ENABLE, 1);
 	OUT_RING  (0);
-	BEGIN_RING(kelvin, NV10TCL_COLOR_CONTROL, 1);
+	BEGIN_RING(kelvin, NV20TCL_BLEND_FUNC_SRC, 4);
+	OUT_RING  (NV20TCL_BLEND_FUNC_SRC_ONE);
+	OUT_RING  (NV20TCL_BLEND_FUNC_DST_ZERO);
+	OUT_RING  (0);			/* NV20TCL_BLEND_COLOR */
+	OUT_RING  (NV20TCL_BLEND_EQUATION_FUNC_ADD);
+	BEGIN_RING(kelvin, NV20TCL_STENCIL_MASK, 7);
+	OUT_RING  (0xff);
+	OUT_RING  (NV20TCL_STENCIL_FUNC_FUNC_ALWAYS);
+	OUT_RING  (0);			/* NV20TCL_STENCIL_FUNC_REF */
+	OUT_RING  (0xff);		/* NV20TCL_STENCIL_FUNC_MASK */
+	OUT_RING  (NV20TCL_STENCIL_OP_FAIL_KEEP);
+	OUT_RING  (NV20TCL_STENCIL_OP_ZFAIL_KEEP);
+	OUT_RING  (NV20TCL_STENCIL_OP_ZPASS_KEEP);
+
+	BEGIN_RING(kelvin, NV20TCL_COLOR_LOGIC_OP_ENABLE, 2);
 	OUT_RING  (0);
-	BEGIN_RING(kelvin, NV10TCL_ENABLED_LIGHTS, 1);
+	OUT_RING  (NV20TCL_COLOR_LOGIC_OP_OP_COPY);
+	BEGIN_RING(kelvin, 0x17cc, 1);
 	OUT_RING  (0);
-	BEGIN_RING(kelvin, NV10TCL_POLYGON_OFFSET_POINT_ENABLE, 3);
+	if (is_nv25tcl) {
+		BEGIN_RING(kelvin, 0x1d84, 1);
+		OUT_RING  (1);
+	}
+	BEGIN_RING(kelvin, NV20TCL_LIGHTING_ENABLE, 1);
 	OUT_RING  (0);
+	BEGIN_RING(kelvin, NV20TCL_LIGHT_CONTROL, 1);
+	OUT_RING  (0x00020000);
+	BEGIN_RING(kelvin, NV20TCL_SEPARATE_SPECULAR_ENABLE, 1);
 	OUT_RING  (0);
+	BEGIN_RING(kelvin, NV20TCL_LIGHT_MODEL_TWO_SIDE_ENABLE, 1);
 	OUT_RING  (0);
-	BEGIN_RING(kelvin, NV10TCL_DEPTH_FUNC, 1);
-	OUT_RING  (0x201);
-	BEGIN_RING(kelvin, NV10TCL_DEPTH_WRITE_ENABLE, 1);
+	BEGIN_RING(kelvin, NV20TCL_ENABLED_LIGHTS, 1);
 	OUT_RING  (0);
-	BEGIN_RING(kelvin, NV10TCL_DEPTH_TEST_ENABLE, 1);
+	BEGIN_RING(kelvin, NV20TCL_NORMALIZE_ENABLE, 1);
 	OUT_RING  (0);
-	BEGIN_RING(kelvin, NV10TCL_POLYGON_OFFSET_FACTOR, 2);
+	BEGIN_RING(kelvin, NV20TCL_POLYGON_STIPPLE_PATTERN(0),
+					NV20TCL_POLYGON_STIPPLE_PATTERN__SIZE);
+	for (i = 0; i < NV20TCL_POLYGON_STIPPLE_PATTERN__SIZE; ++i) {
+		OUT_RING(0xffffffff);
+	}
+
+	BEGIN_RING(kelvin, NV20TCL_POLYGON_OFFSET_POINT_ENABLE, 3);
 	OUT_RING  (0);
+	OUT_RING  (0);		/* NV20TCL.POLYGON_OFFSET_LINE_ENABLE */
+	OUT_RING  (0);		/* NV20TCL.POLYGON_OFFSET_FILL_ENABLE */
+	BEGIN_RING(kelvin, NV20TCL_DEPTH_FUNC, 1);
+	OUT_RING  (NV20TCL_DEPTH_FUNC_LESS);
+	BEGIN_RING(kelvin, NV20TCL_DEPTH_WRITE_ENABLE, 1);
+	OUT_RING  (1);
+	BEGIN_RING(kelvin, NV20TCL_DEPTH_TEST_ENABLE, 1);
 	OUT_RING  (0);
-	BEGIN_RING(kelvin, NV10TCL_POINT_SIZE, 1);
+	BEGIN_RING(kelvin, NV20TCL_POLYGON_OFFSET_FACTOR, 2);
+	OUT_RINGf (0.0);
+	OUT_RINGf (0.0);	/* NV20TCL.POLYGON_OFFSET_UNITS */
+	BEGIN_RING(kelvin, NV20TCL_DEPTH_UNK17D8, 1);
+	OUT_RING  (1);
+	if (!is_nv25tcl) {
+		BEGIN_RING(kelvin, 0x1d84, 1);
+		OUT_RING  (3);
+	}
+	BEGIN_RING(kelvin, NV20TCL_POINT_SIZE, 1);
+	if (!is_nv25tcl) {
+		OUT_RING  (8);
+	} else {
+		OUT_RINGf (1.0);
+	}
+	if (!is_nv25tcl) {
+		BEGIN_RING(kelvin, NV20TCL_POINT_PARAMETERS_ENABLE, 2);
+		OUT_RING  (0);
+		OUT_RING  (0);		/* NV20TCL.POINT_SMOOTH_ENABLE */
+	} else {
+		BEGIN_RING(kelvin, NV20TCL_POINT_PARAMETERS_ENABLE, 1);
+		OUT_RING  (0);
+		BEGIN_RING(kelvin, 0x0a1c, 1);
+		OUT_RING  (0x800);
+	}
+	BEGIN_RING(kelvin, NV20TCL_LINE_WIDTH, 1);
 	OUT_RING  (8);
-	BEGIN_RING(kelvin, NV10TCL_POINT_PARAMETERS_ENABLE, 2);
-	OUT_RING  (0);
+	BEGIN_RING(kelvin, NV20TCL_LINE_SMOOTH_ENABLE, 1);
 	OUT_RING  (0);
-	BEGIN_RING(kelvin, NV10TCL_LINE_WIDTH, 1);
-	OUT_RING  (8);
-	BEGIN_RING(kelvin, NV10TCL_LINE_SMOOTH_ENABLE, 1);
+	BEGIN_RING(kelvin, NV20TCL_POLYGON_MODE_FRONT, 2);
+	OUT_RING  (NV20TCL_POLYGON_MODE_FRONT_FILL);
+	OUT_RING  (NV20TCL_POLYGON_MODE_BACK_FILL);
+	BEGIN_RING(kelvin, NV20TCL_CULL_FACE, 2);
+	OUT_RING  (NV20TCL_CULL_FACE_BACK);
+	OUT_RING  (NV20TCL_FRONT_FACE_CCW);
+	BEGIN_RING(kelvin, NV20TCL_POLYGON_SMOOTH_ENABLE, 1);
 	OUT_RING  (0);
-	BEGIN_RING(kelvin, NV10TCL_POLYGON_MODE_FRONT, 2);
-	OUT_RING  (0x1b02);
-	OUT_RING  (0x1b02);
-	BEGIN_RING(kelvin, NV10TCL_CULL_FACE, 2);
-	OUT_RING  (0x405);
-	OUT_RING  (0x901);
-	BEGIN_RING(kelvin, NV10TCL_POLYGON_SMOOTH_ENABLE, 1);
+	BEGIN_RING(kelvin, NV20TCL_CULL_FACE_ENABLE, 1);
 	OUT_RING  (0);
-	BEGIN_RING(kelvin, NV10TCL_CULL_FACE_ENABLE, 1);
+	BEGIN_RING(kelvin, NV20TCL_SHADE_MODEL, 1);
+	OUT_RING  (NV20TCL_SHADE_MODEL_SMOOTH);
+	BEGIN_RING(kelvin, NV20TCL_POLYGON_STIPPLE_ENABLE, 1);
 	OUT_RING  (0);
-	BEGIN_RING(kelvin, NV10TCL_TX_GEN_S(0), 8);
-	for (i=0;i<8;i++) {
+	BEGIN_RING(kelvin, NV20TCL_TX_GEN_S(0), 4 * NV20TCL_TX_GEN_S__SIZE);
+	for (i=0; i < 4 * NV20TCL_TX_GEN_S__SIZE; ++i) {
+		OUT_RING(0);
+	}
+	BEGIN_RING(kelvin, NV20TCL_FOG_EQUATION_CONSTANT, 3);
+	OUT_RINGf (1.5);
+	OUT_RINGf (-0.090168);		/* NV20TCL.FOG_EQUATION_LINEAR */
+	OUT_RINGf (0.0);		/* NV20TCL.FOG_EQUATION_QUADRATIC */
+	BEGIN_RING(kelvin, NV20TCL_FOG_MODE, 2);
+	OUT_RING  (NV20TCL_FOG_MODE_EXP_2);
+	OUT_RING  (NV20TCL_FOG_COORD_DIST_COORD_FOG);
+	BEGIN_RING(kelvin, NV20TCL_FOG_ENABLE, 2);
+	OUT_RING  (0);
+	OUT_RING  (0);			/* NV20TCL.FOG_COLOR */
+	BEGIN_RING(kelvin, NV20TCL_ENGINE, 1);
+	OUT_RING  (NV20TCL_ENGINE_FIXED);
+
+	for (i = 0; i < NV20TCL_TX_MATRIX_ENABLE__SIZE; ++i) {
+		BEGIN_RING(kelvin, NV20TCL_TX_MATRIX_ENABLE(i), 1);
 		OUT_RING  (0);
 	}
-	BEGIN_RING(kelvin, NV10TCL_FOG_EQUATION_CONSTANT, 3);
-	OUT_RING  (0x3fc00000);	/* -1.50 */
-	OUT_RING  (0xbdb8aa0a);	/* -0.09 */
-	OUT_RING  (0);		/*  0.00 */
 
-	BEGIN_RING(kelvin, NV10TCL_NOP, 1);
-	OUT_RING  (0);
+	BEGIN_RING(kelvin, NV20TCL_VTX_ATTR_4F_X(1), 4 * 15);
+	OUT_RINGf(1.0); OUT_RINGf(0.0); OUT_RINGf(0.0); OUT_RINGf(1.0);
+	OUT_RINGf(0.0); OUT_RINGf(0.0); OUT_RINGf(1.0); OUT_RINGf(1.0);
+	OUT_RINGf(1.0); OUT_RINGf(1.0); OUT_RINGf(1.0); OUT_RINGf(1.0);
+	for (i = 4; i < 16; ++i) {
+		OUT_RINGf(0.0); OUT_RINGf(0.0); OUT_RINGf(0.0);	OUT_RINGf(1.0);
+	}
 
-	BEGIN_RING(kelvin, NV10TCL_FOG_MODE, 2);
-	OUT_RING  (0x802);
-	OUT_RING  (2);
-	/* for some reason VIEW_MATRIX_ENABLE need to be 6 instead of 4 when
-	 * using texturing, except when using the texture matrix
-	 */
-	BEGIN_RING(kelvin, NV10TCL_VIEW_MATRIX_ENABLE, 1);
-	OUT_RING  (6);
-	BEGIN_RING(kelvin, NV10TCL_COLOR_MASK, 1);
-	OUT_RING  (0x01010101);
-
-	/* Set vertex component */
-	BEGIN_RING(kelvin, NV10TCL_VERTEX_COL_4F_R, 4);
-	OUT_RINGf (1.0);
-	OUT_RINGf (1.0);
-	OUT_RINGf (1.0);
-	OUT_RINGf (1.0);
-	BEGIN_RING(kelvin, NV10TCL_VERTEX_COL2_3F_R, 3);
-	OUT_RING  (0);
-	OUT_RING  (0);
-	OUT_RING  (0);
-	BEGIN_RING(kelvin, NV10TCL_VERTEX_NOR_3F_X, 3);
-	OUT_RING  (0);
-	OUT_RING  (0);
-	OUT_RINGf (1.0);
-	BEGIN_RING(kelvin, NV10TCL_VERTEX_TX0_4F_S, 4);
-	OUT_RINGf (0.0);
-	OUT_RINGf (0.0);
-	OUT_RINGf (0.0);
-	OUT_RINGf (1.0);
-	BEGIN_RING(kelvin, NV10TCL_VERTEX_TX1_4F_S, 4);
-	OUT_RINGf (0.0);
-	OUT_RINGf (0.0);
-	OUT_RINGf (0.0);
-	OUT_RINGf (1.0);
-	BEGIN_RING(kelvin, NV10TCL_VERTEX_FOG_1F, 1);
-	OUT_RINGf (0.0);
-	BEGIN_RING(kelvin, NV10TCL_EDGEFLAG_ENABLE, 1);
+	BEGIN_RING(kelvin, NV20TCL_EDGEFLAG_ENABLE, 1);
 	OUT_RING  (1);
+	BEGIN_RING(kelvin, NV20TCL_COLOR_MASK, 1);
+	OUT_RING (0x00010101);
+	BEGIN_RING(kelvin, NV20TCL_CLEAR_VALUE, 1);
+	OUT_RING (0);
 
 	memset(projectionmatrix, 0, sizeof(projectionmatrix));
-	BEGIN_RING(kelvin, NV10TCL_PROJECTION_MATRIX(0), 16);
 	projectionmatrix[0*4+0] = 1.0;
 	projectionmatrix[1*4+1] = 1.0;
 	projectionmatrix[2*4+2] = 1.0;
 	projectionmatrix[3*4+3] = 1.0;
-	for (i=0;i<16;i++) {
+	BEGIN_RING(kelvin, NV20TCL_PROJECTION_MATRIX(0), 16);
+	for (i = 0; i < 16; i++) {
 		OUT_RINGf  (projectionmatrix[i]);
 	}
 
-	BEGIN_RING(kelvin, NV10TCL_DEPTH_RANGE_NEAR, 2);
-	OUT_RING  (0.0);
-	OUT_RINGf  (16777216.0);
+	BEGIN_RING(kelvin, NV20TCL_DEPTH_RANGE_NEAR, 2);
+	OUT_RINGf  (0.0);
+	OUT_RINGf  (16777216.0); /* bpp dependant? */
+
+	BEGIN_RING(kelvin, NV20TCL_VIEWPORT_SCALE0_X, 4);
+	OUT_RINGf  (-2048.0);
+	OUT_RINGf  (-2048.0);
+	OUT_RINGf  (16777215.0 * 0.5);
+	OUT_RING  (0);
 
-	BEGIN_RING(kelvin, NV10TCL_VIEWPORT_SCALE_X, 4);
+	BEGIN_RING(kelvin, NV20TCL_VIEWPORT_SCALE1_X, 4);
 	OUT_RINGf  (-2048.0);
 	OUT_RINGf  (-2048.0);
 	OUT_RINGf  (16777215.0 * 0.5);
diff --git a/src/gallium/drivers/nv20/nv20_fragtex.c b/src/gallium/drivers/nv20/nv20_fragtex.c
index 77c34897e2..94c64f76d5 100644
--- a/src/gallium/drivers/nv20/nv20_fragtex.c
+++ b/src/gallium/drivers/nv20/nv20_fragtex.c
@@ -30,7 +30,7 @@ static INLINE int log2i(int i)
 {                                                                              \
   TRUE,                                                                        \
   PIPE_FORMAT_##m,                                                             \
-  NV10TCL_TX_FORMAT_FORMAT_##tf,                                               \
+  NV20TCL_TX_FORMAT_FORMAT_##tf,                                               \
 }
 
 struct nv20_texture_format {
@@ -47,10 +47,10 @@ nv20_texture_formats[] = {
 	_(L8_UNORM      , L8      ),
 	_(A8_UNORM      , A8      ),
 	_(A8L8_UNORM    , A8L8    ),
-//	_(RGB_DXT1      , DXT1,   ),
-//	_(RGBA_DXT1     , DXT1,   ),
-//	_(RGBA_DXT3     , DXT3,   ),
-//	_(RGBA_DXT5     , DXT5,   ),
+/*	_(RGB_DXT1      , DXT1,   ), */
+/*	_(RGBA_DXT1     , DXT1,   ), */
+/*	_(RGBA_DXT3     , DXT3,   ), */
+/*	_(RGBA_DXT5     , DXT5,   ), */
 	{},
 };
 
diff --git a/src/gallium/drivers/nv20/nv20_prim_vbuf.c b/src/gallium/drivers/nv20/nv20_prim_vbuf.c
index fd9cad177a..74540845a8 100644
--- a/src/gallium/drivers/nv20/nv20_prim_vbuf.c
+++ b/src/gallium/drivers/nv20/nv20_prim_vbuf.c
@@ -80,13 +80,15 @@ nv20_vbuf_render(struct vbuf_render *render)
 
 void nv20_vtxbuf_bind( struct nv20_context* nv20 )
 {
+#if 0
 	int i;
-	for(i = 0; i < 8; i++) {
-		BEGIN_RING(kelvin, NV10TCL_VERTEX_ARRAY_ATTRIB_OFFSET(i), 1);
+	for(i = 0; i < NV20TCL_VTXBUF_ADDRESS__SIZE; i++) {
+		BEGIN_RING(kelvin, NV20TCL_VTXBUF_ADDRESS(i), 1);
 		OUT_RING(0/*nv20->vtxbuf*/);
-		BEGIN_RING(kelvin, NV10TCL_VERTEX_ARRAY_ATTRIB_FORMAT(i) ,1);
+		BEGIN_RING(kelvin, NV20TCL_VTXFMT(i) ,1);
 		OUT_RING(0/*XXX*/);
 	}
+#endif
 }
 
 static const struct vertex_info *
@@ -162,9 +164,9 @@ nv20_vbuf_render_set_primitive( struct vbuf_render *render,
 static uint32_t
 nv20__vtxhwformat(unsigned stride, unsigned fields, unsigned type)
 {
-	return (stride << NV10TCL_VERTEX_ARRAY_ATTRIB_FORMAT_STRIDE_SHIFT) |
-		(fields << NV10TCL_VERTEX_ARRAY_ATTRIB_FORMAT_FIELDS_SHIFT) |
-		(type << NV10TCL_VERTEX_ARRAY_ATTRIB_FORMAT_TYPE_SHIFT);
+	return (stride << NV20TCL_VTXFMT_STRIDE_SHIFT) |
+		(fields << NV20TCL_VTXFMT_SIZE_SHIFT) |
+		(type << NV20TCL_VTXFMT_TYPE_SHIFT);
 }
 
 static unsigned
@@ -199,7 +201,7 @@ nv20__emit_format(struct nv20_context *nv20, enum attrib_emit type, int hwattr)
 		return 0;
 	}
 
-	BEGIN_RING(kelvin, NV10TCL_VERTEX_ARRAY_ATTRIB_FORMAT(hwattr), 1);
+	BEGIN_RING(kelvin, NV20TCL_VTXFMT(hwattr), 1);
 	OUT_RING(hwfmt);
 	return fields;
 }
@@ -208,7 +210,7 @@ static unsigned
 nv20__emit_vertex_array_format(struct nv20_context *nv20)
 {
 	struct vertex_info *vinfo = &nv20->vertex_info;
-	int hwattr = NV10TCL_VERTEX_ARRAY_ATTRIB_FORMAT__SIZE;
+	int hwattr = NV20TCL_VTXFMT__SIZE;
 	int attr = 0;
 	unsigned nr_fields = 0;
 
@@ -220,8 +222,6 @@ nv20__emit_vertex_array_format(struct nv20_context *nv20)
 		} else
 			nv20__emit_format(nv20, EMIT_OMIT, hwattr);
 	}
-	BEGIN_RING(kelvin, NV10TCL_VERTEX_ARRAY_VALIDATE, 1);
-	OUT_RING(0);
 
 	return nr_fields;
 }
@@ -240,7 +240,7 @@ nv20__draw_mbuffer(struct nv20_vbuf_render *nv20_render,
 
 	nr_fields = nv20__emit_vertex_array_format(nv20);
 
-	BEGIN_RING(kelvin, NV10TCL_VERTEX_BEGIN_END, 1);
+	BEGIN_RING(kelvin, NV20TCL_VERTEX_BEGIN_END, 1);
 	OUT_RING(nv20_render->hwprim);
 
 	max_push = 1200 / nr_fields;
@@ -248,8 +248,7 @@ nv20__draw_mbuffer(struct nv20_vbuf_render *nv20_render,
 		int i;
 		int push = MIN2(nr_indices, max_push);
 
-		BEGIN_RING_NI(kelvin, NV10TCL_VERTEX_ARRAY_DATA,
-							push * nr_fields);
+		BEGIN_RING_NI(kelvin, NV20TCL_VERTEX_DATA, push * nr_fields);
 		for (i = 0; i < push; i++) {
 			/* XXX: fixme to handle other than floats? */
 			int f = nr_fields;
@@ -262,8 +261,8 @@ nv20__draw_mbuffer(struct nv20_vbuf_render *nv20_render,
 		indices += push;
 	}
 
-	BEGIN_RING(kelvin, NV10TCL_VERTEX_BEGIN_END, 1);
-	OUT_RING(NV10TCL_VERTEX_BEGIN_END_STOP);
+	BEGIN_RING(kelvin, NV20TCL_VERTEX_BEGIN_END, 1);
+	OUT_RING(NV20TCL_VERTEX_BEGIN_END_STOP);
 }
 
 static void
@@ -274,6 +273,8 @@ nv20__draw_pbuffer(struct nv20_vbuf_render *nv20_render,
 	struct nv20_context *nv20 = nv20_render->nv20;
 	int push, i;
 
+	NOUVEAU_ERR("nv20__draw_pbuffer: this path is broken.\n");
+
 	BEGIN_RING(kelvin, NV10TCL_VERTEX_ARRAY_OFFSET_POS, 1);
 	OUT_RELOCl(nv20_render->pbuffer, 0,
 			NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD);
diff --git a/src/gallium/drivers/nv20/nv20_screen.c b/src/gallium/drivers/nv20/nv20_screen.c
index b7f5ea8512..c0a90f6c58 100644
--- a/src/gallium/drivers/nv20/nv20_screen.c
+++ b/src/gallium/drivers/nv20/nv20_screen.c
@@ -151,7 +151,7 @@ struct pipe_screen *
 nv20_screen_create(struct pipe_winsys *ws, struct nouveau_winsys *nvws)
 {
 	struct nv20_screen *screen = CALLOC_STRUCT(nv20_screen);
-	unsigned celsius_class;
+	unsigned kelvin_class = 0;
 	unsigned chipset = nvws->channel->device->chipset;
 	int ret;
 
@@ -160,21 +160,17 @@ nv20_screen_create(struct pipe_winsys *ws, struct nouveau_winsys *nvws)
 	screen->nvws = nvws;
 
 	/* 3D object */
-	if (chipset>=0x20)
-		celsius_class=NV11TCL;
-	else if (chipset>=0x17)
-		celsius_class=NV17TCL;
-	else if (chipset>=0x11)
-		celsius_class=NV11TCL;
-	else
-		celsius_class=NV10TCL;
-
-	if (!celsius_class) {
-		NOUVEAU_ERR("Unknown nv1x chipset: nv%02x\n", chipset);
+	if (chipset >= 0x25)
+		kelvin_class = NV25TCL;
+	else if (chipset >= 0x20)
+		kelvin_class = NV20TCL;
+
+	if (!kelvin_class || chipset >= 0x30) {
+		NOUVEAU_ERR("Unknown nv2x chipset: nv%02x\n", chipset);
 		return NULL;
 	}
 
-	ret = nvws->grobj_alloc(nvws, celsius_class, &screen->kelvin);
+	ret = nvws->grobj_alloc(nvws, kelvin_class, &screen->kelvin);
 	if (ret) {
 		NOUVEAU_ERR("Error creating 3D object: %d\n", ret);
 		return FALSE;
diff --git a/src/gallium/drivers/nv20/nv20_state.c b/src/gallium/drivers/nv20/nv20_state.c
index c3b87230b7..21bde5b81f 100644
--- a/src/gallium/drivers/nv20/nv20_state.c
+++ b/src/gallium/drivers/nv20/nv20_state.c
@@ -55,30 +55,30 @@ wrap_mode(unsigned wrap) {
 
 	switch (wrap) {
 	case PIPE_TEX_WRAP_REPEAT:
-		ret = NV10TCL_TX_FORMAT_WRAP_S_REPEAT;
+		ret = NV20TCL_TX_WRAP_S_REPEAT;
 		break;
 	case PIPE_TEX_WRAP_MIRROR_REPEAT:
-		ret = NV10TCL_TX_FORMAT_WRAP_S_MIRRORED_REPEAT;
+		ret = NV20TCL_TX_WRAP_S_MIRRORED_REPEAT;
 		break;
 	case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
-		ret = NV10TCL_TX_FORMAT_WRAP_S_CLAMP_TO_EDGE;
+		ret = NV20TCL_TX_WRAP_S_CLAMP_TO_EDGE;
 		break;
 	case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
-		ret = NV10TCL_TX_FORMAT_WRAP_S_CLAMP_TO_BORDER;
+		ret = NV20TCL_TX_WRAP_S_CLAMP_TO_BORDER;
 		break;
 	case PIPE_TEX_WRAP_CLAMP:
-		ret = NV10TCL_TX_FORMAT_WRAP_S_CLAMP;
+		ret = NV20TCL_TX_WRAP_S_CLAMP;
 		break;
 	case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE:
 	case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER:
 	case PIPE_TEX_WRAP_MIRROR_CLAMP:
 	default:
 		NOUVEAU_ERR("unknown wrap mode: %d\n", wrap);
-		ret = NV10TCL_TX_FORMAT_WRAP_S_REPEAT;
+		ret = NV20TCL_TX_WRAP_S_REPEAT;
 		break;
 	}
 
-	return ret >> NV10TCL_TX_FORMAT_WRAP_S_SHIFT;
+	return (ret >> NV20TCL_TX_WRAP_S_SHIFT);
 }
 
 static void *
@@ -90,43 +90,31 @@ nv20_sampler_state_create(struct pipe_context *pipe,
 
 	ps = MALLOC(sizeof(struct nv20_sampler_state));
 
-	ps->wrap = ((wrap_mode(cso->wrap_s) << NV10TCL_TX_FORMAT_WRAP_S_SHIFT) |
-		    (wrap_mode(cso->wrap_t) << NV10TCL_TX_FORMAT_WRAP_T_SHIFT));
+	ps->wrap = ((wrap_mode(cso->wrap_s) << NV20TCL_TX_WRAP_S_SHIFT) |
+		    (wrap_mode(cso->wrap_t) << NV20TCL_TX_WRAP_T_SHIFT));
 
 	ps->en = 0;
 	if (cso->max_anisotropy > 1.0) {
 		/* no idea, binary driver sets it, works without it.. meh.. */
 		ps->wrap |= (1 << 5);
 
-/*		if (cso->max_anisotropy >= 16.0) {
-			ps->en |= NV10TCL_TX_ENABLE_ANISO_16X;
-		} else
-		if (cso->max_anisotropy >= 12.0) {
-			ps->en |= NV10TCL_TX_ENABLE_ANISO_12X;
-		} else
-		if (cso->max_anisotropy >= 10.0) {
-			ps->en |= NV10TCL_TX_ENABLE_ANISO_10X;
-		} else
-		if (cso->max_anisotropy >= 8.0) {
-			ps->en |= NV10TCL_TX_ENABLE_ANISO_8X;
-		} else
-		if (cso->max_anisotropy >= 6.0) {
-			ps->en |= NV10TCL_TX_ENABLE_ANISO_6X;
+/*		if (cso->max_anisotropy >= 8.0) {
+			ps->en |= NV20TCL_TX_ENABLE_ANISO_8X;
 		} else
 		if (cso->max_anisotropy >= 4.0) {
-			ps->en |= NV10TCL_TX_ENABLE_ANISO_4X;
+			ps->en |= NV20TCL_TX_ENABLE_ANISO_4X;
 		} else {
-			ps->en |= NV10TCL_TX_ENABLE_ANISO_2X;
+			ps->en |= NV20TCL_TX_ENABLE_ANISO_2X;
 		}*/
 	}
 
 	switch (cso->mag_img_filter) {
 	case PIPE_TEX_FILTER_LINEAR:
-		filter |= NV10TCL_TX_FILTER_MAGNIFY_LINEAR;
+		filter |= NV20TCL_TX_FILTER_MAGNIFY_LINEAR;
 		break;
 	case PIPE_TEX_FILTER_NEAREST:
 	default:
-		filter |= NV10TCL_TX_FILTER_MAGNIFY_NEAREST;
+		filter |= NV20TCL_TX_FILTER_MAGNIFY_NEAREST;
 		break;
 	}
 
@@ -134,14 +122,15 @@ nv20_sampler_state_create(struct pipe_context *pipe,
 	case PIPE_TEX_FILTER_LINEAR:
 		switch (cso->min_mip_filter) {
 		case PIPE_TEX_MIPFILTER_NEAREST:
-			filter |= NV10TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_NEAREST;
+			filter |=
+				NV20TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_NEAREST;
 			break;
 		case PIPE_TEX_MIPFILTER_LINEAR:
-			filter |= NV10TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_LINEAR;
+			filter |= NV20TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_LINEAR;
 			break;
 		case PIPE_TEX_MIPFILTER_NONE:
 		default:
-			filter |= NV10TCL_TX_FILTER_MINIFY_LINEAR;
+			filter |= NV20TCL_TX_FILTER_MINIFY_LINEAR;
 			break;
 		}
 		break;
@@ -149,14 +138,16 @@ nv20_sampler_state_create(struct pipe_context *pipe,
 	default:
 		switch (cso->min_mip_filter) {
 		case PIPE_TEX_MIPFILTER_NEAREST:
-			filter |= NV10TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_NEAREST;
+			filter |=
+				NV20TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_NEAREST;
 		break;
 		case PIPE_TEX_MIPFILTER_LINEAR:
-			filter |= NV10TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_LINEAR;
+			filter |=
+				NV20TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_LINEAR;
 			break;
 		case PIPE_TEX_MIPFILTER_NONE:
 		default:
-			filter |= NV10TCL_TX_FILTER_MINIFY_NEAREST;
+			filter |= NV20TCL_TX_FILTER_MINIFY_NEAREST;
 			break;
 		}
 		break;
@@ -253,21 +244,23 @@ nv20_rasterizer_state_create(struct pipe_context *pipe,
 
 	rs->templ = cso;
 	
-	rs->shade_model = cso->flatshade ? 0x1d00 : 0x1d01;
+	rs->shade_model = cso->flatshade ? NV20TCL_SHADE_MODEL_FLAT :
+						NV20TCL_SHADE_MODEL_SMOOTH;
 
 	rs->line_width = (unsigned char)(cso->line_width * 8.0) & 0xff;
 	rs->line_smooth_en = cso->line_smooth ? 1 : 0;
 
+	/* XXX: nv20 and nv25 different! */
 	rs->point_size = *(uint32_t*)&cso->point_size;
 
 	rs->poly_smooth_en = cso->poly_smooth ? 1 : 0;
 
 	if (cso->front_winding == PIPE_WINDING_CCW) {
-		rs->front_face = NV10TCL_FRONT_FACE_CCW;
+		rs->front_face = NV20TCL_FRONT_FACE_CCW;
 		rs->poly_mode_front = nvgl_polygon_mode(cso->fill_ccw);
 		rs->poly_mode_back  = nvgl_polygon_mode(cso->fill_cw);
 	} else {
-		rs->front_face = NV10TCL_FRONT_FACE_CW;
+		rs->front_face = NV20TCL_FRONT_FACE_CW;
 		rs->poly_mode_front = nvgl_polygon_mode(cso->fill_cw);
 		rs->poly_mode_back  = nvgl_polygon_mode(cso->fill_ccw);
 	}
@@ -276,20 +269,20 @@ nv20_rasterizer_state_create(struct pipe_context *pipe,
 	case PIPE_WINDING_CCW:
 		rs->cull_face_en = 1;
 		if (cso->front_winding == PIPE_WINDING_CCW)
-			rs->cull_face    = NV10TCL_CULL_FACE_FRONT;
+			rs->cull_face    = NV20TCL_CULL_FACE_FRONT;
 		else
-			rs->cull_face    = NV10TCL_CULL_FACE_BACK;
+			rs->cull_face    = NV20TCL_CULL_FACE_BACK;
 		break;
 	case PIPE_WINDING_CW:
 		rs->cull_face_en = 1;
 		if (cso->front_winding == PIPE_WINDING_CW)
-			rs->cull_face    = NV10TCL_CULL_FACE_FRONT;
+			rs->cull_face    = NV20TCL_CULL_FACE_FRONT;
 		else
-			rs->cull_face    = NV10TCL_CULL_FACE_BACK;
+			rs->cull_face    = NV20TCL_CULL_FACE_BACK;
 		break;
 	case PIPE_WINDING_BOTH:
 		rs->cull_face_en = 1;
-		rs->cull_face    = NV10TCL_CULL_FACE_FRONT_AND_BACK;
+		rs->cull_face    = NV20TCL_CULL_FACE_FRONT_AND_BACK;
 		break;
 	case PIPE_WINDING_NONE:
 	default:
diff --git a/src/gallium/drivers/nv20/nv20_state_emit.c b/src/gallium/drivers/nv20/nv20_state_emit.c
index d0772c527b..5265bf3a31 100644
--- a/src/gallium/drivers/nv20/nv20_state_emit.c
+++ b/src/gallium/drivers/nv20/nv20_state_emit.c
@@ -6,15 +6,17 @@ static void nv20_state_emit_blend(struct nv20_context* nv20)
 {
 	struct nv20_blend_state *b = nv20->blend;
 
-	BEGIN_RING(kelvin, NV10TCL_DITHER_ENABLE, 1);
+	BEGIN_RING(kelvin, NV20TCL_DITHER_ENABLE, 1);
 	OUT_RING  (b->d_enable);
 
-	BEGIN_RING(kelvin, NV10TCL_BLEND_FUNC_ENABLE, 3);
+	BEGIN_RING(kelvin, NV20TCL_BLEND_FUNC_ENABLE, 1);
 	OUT_RING  (b->b_enable);
+
+	BEGIN_RING(kelvin, NV20TCL_BLEND_FUNC_SRC, 2);
 	OUT_RING  (b->b_srcfunc);
 	OUT_RING  (b->b_dstfunc);
 
-	BEGIN_RING(kelvin, NV10TCL_COLOR_MASK, 1);
+	BEGIN_RING(kelvin, NV20TCL_COLOR_MASK, 1);
 	OUT_RING  (b->c_mask);
 }
 
@@ -22,7 +24,7 @@ static void nv20_state_emit_blend_color(struct nv20_context* nv20)
 {
 	struct pipe_blend_color *c = nv20->blend_color;
 
-	BEGIN_RING(kelvin, NV10TCL_BLEND_COLOR, 1);
+	BEGIN_RING(kelvin, NV20TCL_BLEND_COLOR, 1);
 	OUT_RING  ((float_to_ubyte(c->color[3]) << 24)|
 		   (float_to_ubyte(c->color[0]) << 16)|
 		   (float_to_ubyte(c->color[1]) << 8) |
@@ -33,28 +35,28 @@ static void nv20_state_emit_rast(struct nv20_context* nv20)
 {
 	struct nv20_rasterizer_state *r = nv20->rast;
 
-	BEGIN_RING(kelvin, NV10TCL_SHADE_MODEL, 2);
+	BEGIN_RING(kelvin, NV20TCL_SHADE_MODEL, 2);
 	OUT_RING  (r->shade_model);
 	OUT_RING  (r->line_width);
 
 
-	BEGIN_RING(kelvin, NV10TCL_POINT_SIZE, 1);
+	BEGIN_RING(kelvin, NV20TCL_POINT_SIZE, 1);
 	OUT_RING  (r->point_size);
 
-	BEGIN_RING(kelvin, NV10TCL_POLYGON_MODE_FRONT, 2);
+	BEGIN_RING(kelvin, NV20TCL_POLYGON_MODE_FRONT, 2);
 	OUT_RING  (r->poly_mode_front);
 	OUT_RING  (r->poly_mode_back);
 
 
-	BEGIN_RING(kelvin, NV10TCL_CULL_FACE, 2);
+	BEGIN_RING(kelvin, NV20TCL_CULL_FACE, 2);
 	OUT_RING  (r->cull_face);
 	OUT_RING  (r->front_face);
 
-	BEGIN_RING(kelvin, NV10TCL_LINE_SMOOTH_ENABLE, 2);
+	BEGIN_RING(kelvin, NV20TCL_LINE_SMOOTH_ENABLE, 2);
 	OUT_RING  (r->line_smooth_en);
 	OUT_RING  (r->poly_smooth_en);
 
-	BEGIN_RING(kelvin, NV10TCL_CULL_FACE_ENABLE, 1);
+	BEGIN_RING(kelvin, NV20TCL_CULL_FACE_ENABLE, 1);
 	OUT_RING  (r->cull_face_en);
 }
 
@@ -62,29 +64,29 @@ static void nv20_state_emit_dsa(struct nv20_context* nv20)
 {
 	struct nv20_depth_stencil_alpha_state *d = nv20->dsa;
 
-	BEGIN_RING(kelvin, NV10TCL_DEPTH_FUNC, 1);
+	BEGIN_RING(kelvin, NV20TCL_DEPTH_FUNC, 1);
 	OUT_RING (d->depth.func);
 
-	BEGIN_RING(kelvin, NV10TCL_DEPTH_WRITE_ENABLE, 1);
+	BEGIN_RING(kelvin, NV20TCL_DEPTH_WRITE_ENABLE, 1);
 	OUT_RING (d->depth.write_enable);
 
-	BEGIN_RING(kelvin, NV10TCL_DEPTH_TEST_ENABLE, 1);
+	BEGIN_RING(kelvin, NV20TCL_DEPTH_TEST_ENABLE, 1);
 	OUT_RING (d->depth.test_enable);
 
 #if 0
-	BEGIN_RING(kelvin, NV10TCL_STENCIL_ENABLE, 1);
+	BEGIN_RING(kelvin, NV20TCL_STENCIL_ENABLE, 1);
 	OUT_RING (d->stencil.enable);
-	BEGIN_RING(kelvin, NV10TCL_STENCIL_MASK, 7);
+	BEGIN_RING(kelvin, NV20TCL_STENCIL_MASK, 7);
 	OUT_RINGp ((uint32_t *)&(d->stencil.wmask), 7);
 #endif
 
-	BEGIN_RING(kelvin, NV10TCL_ALPHA_FUNC_ENABLE, 1);
+	BEGIN_RING(kelvin, NV20TCL_ALPHA_FUNC_ENABLE, 1);
 	OUT_RING (d->alpha.enabled);
 
-	BEGIN_RING(kelvin, NV10TCL_ALPHA_FUNC_FUNC, 1);
+	BEGIN_RING(kelvin, NV20TCL_ALPHA_FUNC_FUNC, 1);
 	OUT_RING (d->alpha.func);
 
-	BEGIN_RING(kelvin, NV10TCL_ALPHA_FUNC_REF, 1);
+	BEGIN_RING(kelvin, NV20TCL_ALPHA_FUNC_REF, 1);
 	OUT_RING (d->alpha.ref);
 }
 
@@ -94,9 +96,9 @@ static void nv20_state_emit_viewport(struct nv20_context* nv20)
 
 static void nv20_state_emit_scissor(struct nv20_context* nv20)
 {
-	// XXX this is so not working
+	/* NV20TCL_SCISSOR_* is probably a software method */
 /*	struct pipe_scissor_state *s = nv20->scissor;
-	BEGIN_RING(kelvin, NV10TCL_SCISSOR_HORIZ, 2);
+	BEGIN_RING(kelvin, NV20TCL_SCISSOR_HORIZ, 2);
 	OUT_RING  (((s->maxx - s->minx) << 16) | s->minx);
 	OUT_RING  (((s->maxy - s->miny) << 16) | s->miny);*/
 }
@@ -126,25 +128,25 @@ static void nv20_state_emit_framebuffer(struct nv20_context* nv20)
 		zeta = fb->zsbuf;
 	}
 
-	rt_format = NV10TCL_RT_FORMAT_TYPE_LINEAR;
+	rt_format = NV20TCL_RT_FORMAT_TYPE_LINEAR | 0x20;
 
 	switch (colour_format) {
 	case PIPE_FORMAT_A8R8G8B8_UNORM:
 	case 0:
-		rt_format |= NV10TCL_RT_FORMAT_COLOR_A8R8G8B8;
+		rt_format |= NV20TCL_RT_FORMAT_COLOR_A8R8G8B8;
 		break;
 	case PIPE_FORMAT_R5G6B5_UNORM:
-		rt_format |= NV10TCL_RT_FORMAT_COLOR_R5G6B5;
+		rt_format |= NV20TCL_RT_FORMAT_COLOR_R5G6B5;
 		break;
 	default:
 		assert(0);
 	}
 
 	if (zeta) {
-		BEGIN_RING(kelvin, NV10TCL_RT_PITCH, 1);
+		BEGIN_RING(kelvin, NV20TCL_RT_PITCH, 1);
 		OUT_RING  (rt->stride | (zeta->stride << 16));
 	} else {
-		BEGIN_RING(kelvin, NV10TCL_RT_PITCH, 1);
+		BEGIN_RING(kelvin, NV20TCL_RT_PITCH, 1);
 		OUT_RING  (rt->stride | (rt->stride << 16));
 	}
 
@@ -155,13 +157,13 @@ static void nv20_state_emit_framebuffer(struct nv20_context* nv20)
 		nv20->zeta = zeta->buffer;
 	}
 
-	BEGIN_RING(kelvin, NV10TCL_RT_HORIZ, 3);
+	BEGIN_RING(kelvin, NV20TCL_RT_HORIZ, 3);
 	OUT_RING  ((w << 16) | 0);
 	OUT_RING  ((h << 16) | 0);
 	OUT_RING  (rt_format);
-	BEGIN_RING(kelvin, NV10TCL_VIEWPORT_CLIP_HORIZ(0), 2);
-	OUT_RING  (((w - 1) << 16) | 0 | 0x08000800);
-	OUT_RING  (((h - 1) << 16) | 0 | 0x08000800);
+	BEGIN_RING(kelvin, NV20TCL_VIEWPORT_CLIP_HORIZ(0), 2);
+	OUT_RING  (((w - 1) << 16) | 0);
+	OUT_RING  (((h - 1) << 16) | 0);
 }
 
 static void nv20_vertex_layout(struct nv20_context *nv20)
@@ -317,17 +319,17 @@ nv20_emit_hw_state(struct nv20_context *nv20)
 	 */
 
 	/* Render target */
-// XXX figre out who's who for NV10TCL_DMA_* and fill accordingly
-//	BEGIN_RING(kelvin, NV10TCL_DMA_COLOR0, 1);
-//	OUT_RELOCo(nv20->rt[0], NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
-	BEGIN_RING(kelvin, NV10TCL_COLOR_OFFSET, 1);
+/* XXX figre out who's who for NV10TCL_DMA_* and fill accordingly
+ *	BEGIN_RING(kelvin, NV20TCL_DMA_COLOR0, 1);
+ *	OUT_RELOCo(nv20->rt[0], NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); */
+	BEGIN_RING(kelvin, NV20TCL_COLOR_OFFSET, 1);
 	OUT_RELOCl(nv20->rt[0], 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
 
 	if (nv20->zeta) {
-// XXX
-//		BEGIN_RING(kelvin, NV10TCL_DMA_ZETA, 1);
-//		OUT_RELOCo(nv20->zeta, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
-		BEGIN_RING(kelvin, NV10TCL_ZETA_OFFSET, 1);
+/* XXX
+ *		BEGIN_RING(kelvin, NV20TCL_DMA_ZETA, 1);
+ *		OUT_RELOCo(nv20->zeta, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); */
+		BEGIN_RING(kelvin, NV20TCL_ZETA_OFFSET, 1);
 		OUT_RELOCl(nv20->zeta, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
 		/* XXX for when we allocate LMA on nv17 */
 /*		BEGIN_RING(kelvin, NV10TCL_LMA_DEPTH_BUFFER_OFFSET, 1);
@@ -335,23 +337,23 @@ nv20_emit_hw_state(struct nv20_context *nv20)
 	}
 
 	/* Vertex buffer */
-	BEGIN_RING(kelvin, NV10TCL_DMA_VTXBUF0, 1);
+	BEGIN_RING(kelvin, NV20TCL_DMA_VTXBUF0, 1);
 	OUT_RELOCo(nv20->rt[0], NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
-	BEGIN_RING(kelvin, NV10TCL_COLOR_OFFSET, 1);
+	BEGIN_RING(kelvin, NV20TCL_COLOR_OFFSET, 1);
 	OUT_RELOCl(nv20->rt[0], 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
 
 	/* Texture images */
 	for (i = 0; i < 2; i++) {
 		if (!(nv20->fp_samplers & (1 << i)))
 			continue;
-		BEGIN_RING(kelvin, NV10TCL_TX_OFFSET(i), 1);
+		BEGIN_RING(kelvin, NV20TCL_TX_OFFSET(i), 1);
 		OUT_RELOCl(nv20->tex[i].buffer, 0, NOUVEAU_BO_VRAM |
 			   NOUVEAU_BO_GART | NOUVEAU_BO_RD);
-		BEGIN_RING(kelvin, NV10TCL_TX_FORMAT(i), 1);
+		BEGIN_RING(kelvin, NV20TCL_TX_FORMAT(i), 1);
 		OUT_RELOCd(nv20->tex[i].buffer, nv20->tex[i].format,
 			   NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD |
-			   NOUVEAU_BO_OR, NV10TCL_TX_FORMAT_DMA0,
-			   NV10TCL_TX_FORMAT_DMA1);
+			   NOUVEAU_BO_OR, NV20TCL_TX_FORMAT_DMA0,
+			   NV20TCL_TX_FORMAT_DMA1);
 	}
 }