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authorDave Airlie <airlied@itt42.(none)>2009-11-20 11:48:10 +1000
committerDave Airlie <airlied@itt42.(none)>2009-11-20 11:48:10 +1000
commit3f2c77659ca552c43f544228f3a5a5fe6365513a (patch)
treef98f22ac8a1dbcaa9c457d8f64731c6d4a374cdb /src/mesa/drivers/dri/r600/r700_chip.c
parentb09e74901a4f92299fe3f52f57d27fd5ca5bdd2d (diff)
parentf8ea5318200c1ed839fc387b16a57c8d9969974b (diff)
Merge remote branch 'origin/mesa_7_7_branch'
Diffstat (limited to 'src/mesa/drivers/dri/r600/r700_chip.c')
-rw-r--r--src/mesa/drivers/dri/r600/r700_chip.c10
1 files changed, 7 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/r600/r700_chip.c b/src/mesa/drivers/dri/r600/r700_chip.c
index 705b5738ed..8126777bf4 100644
--- a/src/mesa/drivers/dri/r600/r700_chip.c
+++ b/src/mesa/drivers/dri/r600/r700_chip.c
@@ -54,11 +54,15 @@ static void r700SendTexState(GLcontext *ctx, struct radeon_state_atom *atom)
for (i = 0; i < R700_TEXTURE_NUMBERUNITS; i++) {
if (ctx->Texture.Unit[i]._ReallyEnabled) {
radeonTexObj *t = r700->textures[i];
+ uint32_t offset;
if (t) {
- if (!t->image_override)
+ if (!t->image_override) {
bo = t->mt->bo;
- else
+ offset = get_base_teximage_offset(t);
+ } else {
bo = t->bo;
+ offset = 0;
+ }
if (bo) {
r700SyncSurf(context, bo,
@@ -77,7 +81,7 @@ static void r700SendTexState(GLcontext *ctx, struct radeon_state_atom *atom)
R600_OUT_BATCH(r700->textures[i]->SQ_TEX_RESOURCE6);
R600_OUT_BATCH_RELOC(r700->textures[i]->SQ_TEX_RESOURCE2,
bo,
- 0,
+ offset,
RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0, 0);
R600_OUT_BATCH_RELOC(r700->textures[i]->SQ_TEX_RESOURCE3,
bo,