summaryrefslogtreecommitdiff
path: root/src/mesa/drivers/dri/nouveau
diff options
context:
space:
mode:
Diffstat (limited to 'src/mesa/drivers/dri/nouveau')
-rw-r--r--src/mesa/drivers/dri/nouveau/nouveau_card_list.h66
-rw-r--r--src/mesa/drivers/dri/nouveau/nouveau_context.c36
-rw-r--r--src/mesa/drivers/dri/nouveau/nouveau_context.h6
-rw-r--r--src/mesa/drivers/dri/nouveau/nouveau_driver.c70
-rw-r--r--src/mesa/drivers/dri/nouveau/nv10_state.c86
5 files changed, 148 insertions, 116 deletions
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_card_list.h b/src/mesa/drivers/dri/nouveau/nouveau_card_list.h
index b1a0e7bfd1..94f170e057 100644
--- a/src/mesa/drivers/dri/nouveau/nouveau_card_list.h
+++ b/src/mesa/drivers/dri/nouveau/nouveau_card_list.h
@@ -72,10 +72,10 @@ static nouveau_card nouveau_card_list[]={
{0x014D, "Quadro FX 550", NV30_TCL_PRIMITIVE_3D|0x4000, NV_40, 0},
{0x014E, "Quadro FX 540", NV30_TCL_PRIMITIVE_3D|0x4000, NV_40, 0},
{0x014F, "GeForce 6200", NV30_TCL_PRIMITIVE_3D|0x4000, NV_40, 0},
-{0x0150, "GeForce2 GTS/Pro", NV11_TCL_PRIMITIVE_3D, NV_15, 0},
-{0x0151, "GeForce2 Ti", NV11_TCL_PRIMITIVE_3D, NV_15, 0},
-{0x0152, "GeForce2 Ultra, Bladerunner", NV11_TCL_PRIMITIVE_3D, NV_15, 0},
-{0x0153, "Quadro2 Pro", NV11_TCL_PRIMITIVE_3D, NV_15, 0},
+{0x0150, "GeForce2 GTS/Pro", NV11_TCL_PRIMITIVE_3D, NV_11, 0},
+{0x0151, "GeForce2 Ti", NV11_TCL_PRIMITIVE_3D, NV_11, 0},
+{0x0152, "GeForce2 Ultra, Bladerunner", NV11_TCL_PRIMITIVE_3D, NV_11, 0},
+{0x0153, "Quadro2 Pro", NV11_TCL_PRIMITIVE_3D, NV_11, 0},
{0x0161, "GeForce 6200 TurboCache(TM)", NV30_TCL_PRIMITIVE_3D|0x4400, NV_44, 0},
{0x0162, "GeForce 6200 SE TurboCache (TM)", NV30_TCL_PRIMITIVE_3D|0x4400, NV_44, 0},
{0x0163, "GeForce 6200 LE", NV30_TCL_PRIMITIVE_3D|0x4400, NV_44, 0},
@@ -132,20 +132,20 @@ static nouveau_card nouveau_card_list[]={
{0x0240, "GeForce 6150", NV30_TCL_PRIMITIVE_3D|0x4400, NV_44, 0},
{0x0242, "GeForce 6100", NV30_TCL_PRIMITIVE_3D|0x4400, NV_44, 0},
{0x0244, "Geforce 6150 Go", NV30_TCL_PRIMITIVE_3D|0x4400, NV_44, 0},
-{0x0250, "GeForce4 Ti 4600", NV20_TCL_PRIMITIVE_3D|0x0500, NV_25, 0},
-{0x0251, "GeForce4 Ti 4400", NV20_TCL_PRIMITIVE_3D|0x0500, NV_25, 0},
-{0x0252, "GeForce4 Ti", NV20_TCL_PRIMITIVE_3D|0x0500, NV_25, 0},
-{0x0253, "GeForce4 Ti 4200", NV20_TCL_PRIMITIVE_3D|0x0500, NV_25, 0},
-{0x0258, "Quadro4 900 XGL", NV20_TCL_PRIMITIVE_3D|0x0500, NV_25, 0},
-{0x0259, "Quadro4 750 XGL", NV20_TCL_PRIMITIVE_3D|0x0500, NV_25, 0},
-{0x025B, "Quadro4 700 XGL", NV20_TCL_PRIMITIVE_3D|0x0500, NV_25, 0},
-{0x0280, "GeForce4 Ti 4800", NV20_TCL_PRIMITIVE_3D|0x0500, NV_25, 0},
-{0x0281, "GeForce4 Ti 4200 AGP 8x", NV20_TCL_PRIMITIVE_3D|0x0500, NV_25, 0},
-{0x0282, "GeForce4 Ti 4800 SE", NV20_TCL_PRIMITIVE_3D|0x0500, NV_25, 0},
-{0x0286, "GeForce4 Ti 4200 Go AGP 8x", NV20_TCL_PRIMITIVE_3D|0x0500, NV_25, 0},
-{0x0288, "Quadro4 980 XGL", NV20_TCL_PRIMITIVE_3D|0x0500, NV_25, 0},
-{0x0289, "Quadro4 780 XGL", NV20_TCL_PRIMITIVE_3D|0x0500, NV_25, 0},
-{0x028C, "Quadro4 700 GoGL", NV20_TCL_PRIMITIVE_3D|0x0500, NV_25, 0},
+{0x0250, "GeForce4 Ti 4600", NV20_TCL_PRIMITIVE_3D|0x0500, NV_20, 0},
+{0x0251, "GeForce4 Ti 4400", NV20_TCL_PRIMITIVE_3D|0x0500, NV_20, 0},
+{0x0252, "GeForce4 Ti", NV20_TCL_PRIMITIVE_3D|0x0500, NV_20, 0},
+{0x0253, "GeForce4 Ti 4200", NV20_TCL_PRIMITIVE_3D|0x0500, NV_20, 0},
+{0x0258, "Quadro4 900 XGL", NV20_TCL_PRIMITIVE_3D|0x0500, NV_20, 0},
+{0x0259, "Quadro4 750 XGL", NV20_TCL_PRIMITIVE_3D|0x0500, NV_20, 0},
+{0x025B, "Quadro4 700 XGL", NV20_TCL_PRIMITIVE_3D|0x0500, NV_20, 0},
+{0x0280, "GeForce4 Ti 4800", NV20_TCL_PRIMITIVE_3D|0x0500, NV_20, 0},
+{0x0281, "GeForce4 Ti 4200 AGP 8x", NV20_TCL_PRIMITIVE_3D|0x0500, NV_20, 0},
+{0x0282, "GeForce4 Ti 4800 SE", NV20_TCL_PRIMITIVE_3D|0x0500, NV_20, 0},
+{0x0286, "GeForce4 Ti 4200 Go AGP 8x", NV20_TCL_PRIMITIVE_3D|0x0500, NV_20, 0},
+{0x0288, "Quadro4 980 XGL", NV20_TCL_PRIMITIVE_3D|0x0500, NV_20, 0},
+{0x0289, "Quadro4 780 XGL", NV20_TCL_PRIMITIVE_3D|0x0500, NV_20, 0},
+{0x028C, "Quadro4 700 GoGL", NV20_TCL_PRIMITIVE_3D|0x0500, NV_20, 0},
{0x0290, "GeForce 7900 GTX", NV30_TCL_PRIMITIVE_3D|0x4000, NV_40, 0},
{0x0291, "GeForce 7900 GT", NV30_TCL_PRIMITIVE_3D|0x4000, NV_40, 0},
{0x0292, "GeForce 7900 GS", NV30_TCL_PRIMITIVE_3D|0x4000, NV_40, 0},
@@ -176,21 +176,21 @@ static nouveau_card nouveau_card_list[]={
{0x031D, "NV31GLM", NV30_TCL_PRIMITIVE_3D|0x0300, NV_30, 0},
{0x031E, "NV31GLM Pro", NV30_TCL_PRIMITIVE_3D|0x0300, NV_30, 0},
{0x031F, "NV31GLM Pro", NV30_TCL_PRIMITIVE_3D|0x0300, NV_30, 0},
-{0x0320, "GeForce FX 5200", NV30_TCL_PRIMITIVE_3D|0x0600, NV_34, 0},
-{0x0321, "GeForce FX 5200 Ultra", NV30_TCL_PRIMITIVE_3D|0x0600, NV_34, 0},
-{0x0322, "GeForce FX 5200", NV30_TCL_PRIMITIVE_3D|0x0600, NV_34, 0},
-{0x0323, "GeForce FX 5200LE", NV30_TCL_PRIMITIVE_3D|0x0600, NV_34, 0},
-{0x0324, "GeForce FX Go5200", NV30_TCL_PRIMITIVE_3D|0x0600, NV_34, 0},
-{0x0325, "GeForce FX Go5250", NV30_TCL_PRIMITIVE_3D|0x0600, NV_34, 0},
-{0x0326, "GeForce FX 5500", NV30_TCL_PRIMITIVE_3D|0x0600, NV_34, 0},
-{0x0327, "GeForce FX 5100", NV30_TCL_PRIMITIVE_3D|0x0600, NV_34, 0},
-{0x0328, "GeForce FX Go5200 32M/64M", NV30_TCL_PRIMITIVE_3D|0x0600, NV_34, 0},
-{0x0329, "GeForce FX Go5200", NV30_TCL_PRIMITIVE_3D|0x0600, NV_34, 0},
-{0x032A, "Quadro NVS 280 PCI", NV30_TCL_PRIMITIVE_3D|0x0600, NV_34, 0},
-{0x032B, "Quadro FX 500/600 PCI", NV30_TCL_PRIMITIVE_3D|0x0600, NV_34, 0},
-{0x032C, "GeForce FX Go 5300", NV30_TCL_PRIMITIVE_3D|0x0600, NV_34, 0},
-{0x032D, "GeForce FX Go5100", NV30_TCL_PRIMITIVE_3D|0x0600, NV_34, 0},
-{0x032F, "NV34GL", NV30_TCL_PRIMITIVE_3D|0x0600, NV_34, 0},
+{0x0320, "GeForce FX 5200", NV30_TCL_PRIMITIVE_3D|0x0600, NV_30, 0},
+{0x0321, "GeForce FX 5200 Ultra", NV30_TCL_PRIMITIVE_3D|0x0600, NV_30, 0},
+{0x0322, "GeForce FX 5200", NV30_TCL_PRIMITIVE_3D|0x0600, NV_30, 0},
+{0x0323, "GeForce FX 5200LE", NV30_TCL_PRIMITIVE_3D|0x0600, NV_30, 0},
+{0x0324, "GeForce FX Go5200", NV30_TCL_PRIMITIVE_3D|0x0600, NV_30, 0},
+{0x0325, "GeForce FX Go5250", NV30_TCL_PRIMITIVE_3D|0x0600, NV_30, 0},
+{0x0326, "GeForce FX 5500", NV30_TCL_PRIMITIVE_3D|0x0600, NV_30, 0},
+{0x0327, "GeForce FX 5100", NV30_TCL_PRIMITIVE_3D|0x0600, NV_30, 0},
+{0x0328, "GeForce FX Go5200 32M/64M", NV30_TCL_PRIMITIVE_3D|0x0600, NV_30, 0},
+{0x0329, "GeForce FX Go5200", NV30_TCL_PRIMITIVE_3D|0x0600, NV_30, 0},
+{0x032A, "Quadro NVS 280 PCI", NV30_TCL_PRIMITIVE_3D|0x0600, NV_30, 0},
+{0x032B, "Quadro FX 500/600 PCI", NV30_TCL_PRIMITIVE_3D|0x0600, NV_30, 0},
+{0x032C, "GeForce FX Go 5300", NV30_TCL_PRIMITIVE_3D|0x0600, NV_30, 0},
+{0x032D, "GeForce FX Go5100", NV30_TCL_PRIMITIVE_3D|0x0600, NV_30, 0},
+{0x032F, "NV34GL", NV30_TCL_PRIMITIVE_3D|0x0600, NV_30, 0},
{0x0330, "GeForce FX 5900 Ultra", NV30_TCL_PRIMITIVE_3D|0x0400, NV_30, 0},
{0x0331, "GeForce FX 5900", NV30_TCL_PRIMITIVE_3D|0x0400, NV_30, 0},
{0x0332, "GeForce FX 5900XT", NV30_TCL_PRIMITIVE_3D|0x0400, NV_30, 0},
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_context.c b/src/mesa/drivers/dri/nouveau/nouveau_context.c
index f36483a3d4..a8569a9f15 100644
--- a/src/mesa/drivers/dri/nouveau/nouveau_context.c
+++ b/src/mesa/drivers/dri/nouveau/nouveau_context.c
@@ -378,3 +378,39 @@ void nouveauCopySubBuffer(__DRIdrawablePrivate *dPriv,
{
}
+void nouveauClearBuffer(GLcontext *ctx, nouveau_renderbuffer_t *buffer,
+ int fill, int mask)
+{
+ nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
+ int dimensions;
+
+ if (!buffer) {
+ return;
+ }
+
+ /* FIXME: only support 32 bits atm */
+
+ /* Surface that we will work on */
+ nouveauObjectOnSubchannel(nmesa, NvSubCtxSurf2D, NvCtxSurf2D);
+
+ BEGIN_RING_SIZE(NvSubCtxSurf2D, NV10_CONTEXT_SURFACES_2D_FORMAT, 4);
+ OUT_RING(0x0b); /* Y32 color format */
+ OUT_RING((buffer->pitch<<16)|buffer->pitch);
+ OUT_RING(buffer->offset);
+ OUT_RING(buffer->offset);
+
+ /* Now clear a rectangle */
+ dimensions = ((buffer->mesa.Height)<<16) | (buffer->mesa.Width);
+
+ nouveauObjectOnSubchannel(nmesa, NvSubGdiRectText, NvGdiRectText);
+
+ BEGIN_RING_SIZE(NvSubGdiRectText, NV04_GDI_RECTANGLE_TEXT_OPERATION, 1);
+ OUT_RING(3); /* SRCCOPY */
+
+ BEGIN_RING_SIZE(NvSubGdiRectText, NV04_GDI_RECTANGLE_TEXT_BLOCK_LEVEL1_TL, 5);
+ OUT_RING(0); /* top left */
+ OUT_RING(dimensions); /* bottom right */
+ OUT_RING(fill);
+ OUT_RING(0); /* top left */
+ OUT_RING(dimensions); /* bottom right */
+}
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_context.h b/src/mesa/drivers/dri/nouveau/nouveau_context.h
index 77fe13a9cd..9aff0ee668 100644
--- a/src/mesa/drivers/dri/nouveau/nouveau_context.h
+++ b/src/mesa/drivers/dri/nouveau/nouveau_context.h
@@ -133,9 +133,6 @@ typedef struct nouveau_context {
nouveau_renderbuffer_t *color_buffer;
nouveau_renderbuffer_t *depth_buffer;
- /* Color buffer clear value */
- uint32_t clear_color_value;
-
/* Depth/stencil clear value */
uint32_t clear_value;
@@ -234,6 +231,9 @@ extern void nouveauSwapBuffers(__DRIdrawablePrivate *dPriv);
extern void nouveauCopySubBuffer(__DRIdrawablePrivate *dPriv,
int x, int y, int w, int h);
+extern void nouveauClearBuffer(GLcontext *ctx, nouveau_renderbuffer_t *buffer,
+ int fill, int mask);
+
/* Debugging utils: */
extern int NOUVEAU_DEBUG;
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_driver.c b/src/mesa/drivers/dri/nouveau/nouveau_driver.c
index 4851c66835..8b76779002 100644
--- a/src/mesa/drivers/dri/nouveau/nouveau_driver.c
+++ b/src/mesa/drivers/dri/nouveau/nouveau_driver.c
@@ -35,6 +35,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "framebuffer.h"
#include "utils.h"
+#include "colormac.h"
/* Wrapper for DRM_NOUVEAU_GETPARAM ioctl */
GLboolean nouveauDRMGetParam(nouveauContextPtr nmesa,
@@ -135,7 +136,74 @@ static void nouveauFinish( GLcontext *ctx )
/* glClear */
static void nouveauClear( GLcontext *ctx, GLbitfield mask )
{
- // XXX we really should do something here...
+ uint32_t clear_value;
+ nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
+
+ /* FIXME: should we clear front buffer, even if asked to do it? */
+ if (mask & (BUFFER_BIT_FRONT_LEFT|BUFFER_BIT_BACK_LEFT)) {
+ GLubyte c[4];
+ int color_bits = 32;
+ int color_mask = 0xffffffff;
+
+ UNCLAMPED_FLOAT_TO_RGBA_CHAN(c,ctx->Color.ClearColor);
+ clear_value = PACK_COLOR_8888(c[3],c[0],c[1],c[2]);
+
+ if (ctx->DrawBuffer) {
+ /* FIXME: find correct color buffer, instead of [0][0] */
+ if (ctx->DrawBuffer->_ColorDrawBuffers[0][0]) {
+ color_bits = ctx->DrawBuffer->_ColorDrawBuffers[0][0]->RedBits;
+ color_bits += ctx->DrawBuffer->_ColorDrawBuffers[0][0]->GreenBits;
+ color_bits += ctx->DrawBuffer->_ColorDrawBuffers[0][0]->BlueBits;
+ color_bits += ctx->DrawBuffer->_ColorDrawBuffers[0][0]->AlphaBits;
+ }
+ }
+
+ if (color_bits<24) {
+ clear_value = PACK_COLOR_565(c[0],c[1],c[2]);
+ color_mask = 0xffff;
+ }
+
+ nouveauClearBuffer(ctx, nmesa->color_buffer,
+ clear_value, color_mask);
+ }
+
+ if (mask & (BUFFER_BIT_DEPTH)) {
+ int depth_bits = 24;
+ int depth_mask;
+ if (ctx->DrawBuffer) {
+ if (ctx->DrawBuffer->_DepthBuffer) {
+ depth_bits = ctx->DrawBuffer->_DepthBuffer->DepthBits;
+ }
+ }
+
+ switch(depth_bits) {
+ case 16:
+ clear_value = (uint32_t) (ctx->Depth.Clear * 32767.0);
+ depth_mask = 0xffff;
+ break;
+ default:
+ clear_value = ((uint32_t) (ctx->Depth.Clear * 16777215.0)) << 8;
+ depth_mask = 0xffffff00;
+ break;
+ }
+
+ nouveauClearBuffer(ctx, nmesa->depth_buffer,
+ clear_value, depth_mask);
+ }
+
+ if (mask & (BUFFER_BIT_STENCIL)) {
+ int stencil_bits = 0;
+ if (ctx->DrawBuffer) {
+ if (ctx->DrawBuffer->_StencilBuffer) {
+ stencil_bits = ctx->DrawBuffer->_StencilBuffer->StencilBits;
+ }
+ }
+
+ if (stencil_bits>0) {
+ nouveauClearBuffer(ctx, nmesa->depth_buffer,
+ ctx->Stencil.Clear, (1<<stencil_bits)-1);
+ }
+ }
}
void nouveauDriverInitFunctions( struct dd_function_table *functions )
diff --git a/src/mesa/drivers/dri/nouveau/nv10_state.c b/src/mesa/drivers/dri/nouveau/nv10_state.c
index 8cbe72020f..3e5bfe093f 100644
--- a/src/mesa/drivers/dri/nouveau/nv10_state.c
+++ b/src/mesa/drivers/dri/nouveau/nv10_state.c
@@ -110,91 +110,19 @@ static void nv10BlendFuncSeparate(GLcontext *ctx, GLenum sfactorRGB, GLenum dfac
OUT_RING_CACHE(dfactorRGB);
}
-static void nv10ClearBuffer(GLcontext *ctx, nouveau_renderbuffer_t *buffer, int fill, int mask)
-{
- nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
- int dimensions;
-
- if (!buffer) {
- return;
- }
-
- /* Surface that we will work on */
- nouveauObjectOnSubchannel(nmesa, NvSubCtxSurf2D, NvCtxSurf2D);
-
- BEGIN_RING_SIZE(NvSubCtxSurf2D, NV10_CONTEXT_SURFACES_2D_FORMAT, 4);
- OUT_RING(0x0b); /* Y32 color format */
- OUT_RING((buffer->pitch<<16)|buffer->pitch);
- OUT_RING(buffer->offset);
- OUT_RING(buffer->offset);
-
- /* Now clear a rectangle */
- dimensions = ((buffer->mesa.Height)<<16) | (buffer->mesa.Width);
-
- nouveauObjectOnSubchannel(nmesa, NvSubGdiRectText, NvGdiRectText);
-
- BEGIN_RING_SIZE(NvSubGdiRectText, NV04_GDI_RECTANGLE_TEXT_OPERATION, 1);
- OUT_RING(3); /* SRCCOPY */
-
- BEGIN_RING_SIZE(NvSubGdiRectText, NV04_GDI_RECTANGLE_TEXT_BLOCK_LEVEL1_TL, 5);
- OUT_RING(0); /* top left */
- OUT_RING(dimensions); /* bottom right */
- OUT_RING(fill);
- OUT_RING(0); /* top left */
- OUT_RING(dimensions); /* bottom right */
-}
-
-static void nv10Clear(GLcontext *ctx, GLbitfield mask)
-{
- nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
- if (mask & (BUFFER_BIT_FRONT_LEFT|BUFFER_BIT_BACK_LEFT)) {
- nv10ClearBuffer(ctx, nmesa->color_buffer,
- nmesa->clear_color_value, 0xffffffff);
- }
- /* FIXME: check depth bits */
- if (mask & (BUFFER_BIT_DEPTH)) {
- nv10ClearBuffer(ctx, nmesa->depth_buffer,
- nmesa->clear_value, 0xffffff00);
- }
- /* FIXME: check about stencil? */
- if (mask & (BUFFER_BIT_STENCIL)) {
- nv10ClearBuffer(ctx, nmesa->depth_buffer,
- nmesa->clear_value, 0x000000ff);
- }
-}
-
static void nv10ClearColor(GLcontext *ctx, const GLfloat color[4])
{
- nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
- GLubyte c[4];
- UNCLAMPED_FLOAT_TO_RGBA_CHAN(c,color);
- nmesa->clear_color_value = PACK_COLOR_8888(c[3],c[0],c[1],c[2]);
+ /* Not for NV10 */
}
static void nv10ClearDepth(GLcontext *ctx, GLclampd d)
{
- nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-/* switch (ctx->DrawBuffer->_DepthBuffer->DepthBits) {
- case 16:
- nmesa->clear_value = (uint32_t)(d*0x7FFF);
- break;
- case 24:*/
- nmesa->clear_value = ((nmesa->clear_value&0x000000FF) |
- (((uint32_t)(d*0xFFFFFF))<<8));
-/* break;
- }*/
+ /* Not for NV10 */
}
static void nv10ClearStencil(GLcontext *ctx, GLint s)
{
- nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-/* if (ctx->DrawBuffer->_DepthBuffer->DepthBits == 24) {*/
- nmesa->clear_value = ((nmesa->clear_value&0xFFFFFF00)|
- (s&0x000000FF));
-/* }*/
+ /* Not for NV10 */
}
static void nv10ClipPlane(GLcontext *ctx, GLenum plane, const GLfloat *equation)
@@ -1037,10 +965,10 @@ void nv10InitStateFuncs(GLcontext *ctx, struct dd_function_table *func)
func->BlendColor = nv10BlendColor;
func->BlendEquationSeparate = nv10BlendEquationSeparate;
func->BlendFuncSeparate = nv10BlendFuncSeparate;
- func->Clear = nv10Clear;
- func->ClearColor = nv10ClearColor;
- func->ClearDepth = nv10ClearDepth;
- func->ClearStencil = nv10ClearStencil;
+/* func->Clear = nv10Clear;*/ /* Not for NV10 */
+ func->ClearColor = nv10ClearColor; /* Not for NV10 */
+ func->ClearDepth = nv10ClearDepth; /* Not for NV10 */
+ func->ClearStencil = nv10ClearStencil; /* Not for NV10 */
func->ClipPlane = nv10ClipPlane;
func->ColorMask = nv10ColorMask;
func->ColorMaterial = nv10ColorMaterial;
generated by cgit v1.2.3 (git 2.39.1) at 2024-07-04 15:00:55 +0000