| Age | Commit message (Expand) | Author |
|---|
| 2010-06-12 | i965: Use the new message header format for FF_SYNC on gen6. | Zhenyu Wang |
| 2010-06-12 | i965: Add support for math instructions in the gen6 WM. | Zhenyu Wang |
| 2010-05-18 | i965: Remove constant or ignored-by-hw args from FF sync message setup. | Eric Anholt |
| 2010-04-21 | intel: Clean up chipset name and gen num for Ironlake | Zhenyu Wang |
| 2010-03-22 | i965: Ignore execution mask for the mov(m0, g0) of VS URB write header on SNB. | Eric Anholt |
| 2010-03-10 | i965: Use the PLN instruction when possible in interpolation. | Eric Anholt |
| 2010-03-10 | i965: Set up the execution size before relying on it. | Eric Anholt |
| 2010-03-10 | i965: Fix the response len of masked sampler messages for 8-wide dispatch. | Eric Anholt |
| 2010-02-25 | i965: Try to hook up the Sandybridge URB_WRITE SEND message. | Eric Anholt |
| 2010-02-25 | i965: Add SNB math opcode support. | Eric Anholt |
| 2010-02-19 | Replace the _mesa_*printf() wrappers with the plain libc versions | Kristian Høgsberg |
| 2009-12-31 | Merge branch 'mesa_7_7_branch' | Brian Paul |
| 2009-12-28 | intel: Silence compiler warnings. | Vinson Lee |
| 2009-12-27 | Merge branch 'mesa_7_6_branch' into mesa_7_7_branch | Brian Paul |
| 2009-12-24 | i965: Fix assert. | Vinson Lee |
| 2009-12-22 | intel: Replace IS_G4X() across the driver with context structure usage. | Eric Anholt |
| 2009-12-22 | intel: Replace IS_IGDNG checks with intel->is_ironlake or needs_ff_sync. | Eric Anholt |
| 2009-11-06 | i965: Use Compr4 instruction compression mode on G4X and newer. | Eric Anholt |
| 2009-08-04 | i965: Don't set pop_count in the reserved MBZ area of IF statements. | Eric Anholt |
| 2009-08-04 | i965: Spell "conditional" correctly. | Eric Anholt |
| 2009-07-15 | i965: the offset of any branch/jump instruction is in unit of 64bits on IGDNG | Xiang, Haihao |
| 2009-07-13 | i965: add support for new chipsets | Xiang, Haihao |
| 2009-07-02 | i965: fixes for JMPI | Xiang, Haihao |
| 2009-06-30 | i965: use BRW_MAX_MRF | Brian Paul |
| 2009-06-26 | i965: fix fetching constants from constant buffer in glsl path | Roland Scheidegger |
| 2009-04-17 | i915: fix broken indirect constant buffer reads | Brian Paul |
| 2009-04-16 | i965: implement relative addressing for VS constant buffer reads | Brian Paul |
| 2009-04-14 | i965: fix VS constant buffer reads | Brian Paul |
| 2009-04-14 | i965: checkpoint commit: VS constant buffers | Brian Paul |
| 2009-04-09 | i965: new SURF_INDEX_ macros | Brian Paul |
| 2009-04-08 | i965: set BRW_MASK_DISABLE flag in "send" instruction in brw_dp_READ_4() | Brian Paul |
| 2009-04-03 | i965: s/GL_FALSE/BRW_COMPRESSION_NONE/ | Brian Paul |
| 2009-04-03 | i965: fix response length param in brw_dp_READ_4() | Brian Paul |
| 2009-04-03 | i965: added new brw_dp_READ_4() function | Brian Paul |
| 2009-04-03 | i965: new and updated comments | Brian Paul |
| 2009-04-03 | i965: comments for brw_SAMPLE() | Brian Paul |
| 2009-03-13 | i965: add some register number assertions | Brian Paul |
| 2009-02-13 | i965: minor clean-ups | Brian Paul |
| 2009-01-05 | i965: implement OPCODE_TRUNC (round toward zero) on vertex path. | Brian Paul |
| 2008-11-02 | i965: Merge GM45 into the G4X chipset define. | Eric Anholt |
| 2008-11-01 | Fix for 58dc8b7: dest regions must not use HorzStride 0 in ExecSize 1 | Keith Packard |
| 2008-10-31 | i965: support destination horiz strides in align1 access mode. | Gary Wong |
| 2008-08-29 | i965: force thread switch after IF/ELSE/ENDIF. partial fix for #16882. | Xiang, Haihao |
| 2008-08-29 | i965: mask control for BREAK/CONT/DO/WHILE. partial fix fox #16882 | Xiang, Haihao |
| 2008-07-08 | i965: official name for GM45 chipset | Xiang, Haihao |
| 2008-01-29 | i965: new integrated graphics chipset support | Xiang, Haihao |
| 2007-11-27 | i965: The jump instruction count is added | Xiang, Haihao |
| 2007-09-29 | support continue, fix conditional | Zou Nan hai |
| 2007-06-21 | support branch and loop in pixel shader | Zou Nan hai |
| 2007-04-12 | Initial 965 GLSL support | Zou Nan hai |
