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android-x86-mesa.git
envsa_r300
froyo-x86
r300
Androïd/x86 port of Mesa drivers
Hugues Hiegel
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i965
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brw_eu_emit.c
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Author
2010-08-30
i965: Make brw_CONT and brw_BREAK take the pop count.
Eric Anholt
2010-08-20
i965: Also use the SIMD8 FB writes for SIMD8 mode on non-SNB.
Eric Anholt
2010-08-20
i965: Add support for FB writes on Sandybridge.
Zhenyu Wang
2010-08-20
i965: Set the destination horiz stride even for da16, as SNB seems to need it.
Zhenyu Wang
2010-07-21
i965: Clean up brw_dp_READ_4_vs() now that it has fewer options to support.
Eric Anholt
2010-07-21
i965: Support relative addressed VS constant reads using the appropriate msg.
Eric Anholt
2010-07-21
i956: Set the execution size correctly for scratch space writes.
Eric Anholt
2010-07-21
i965: Use the pretty define for 4-oword DP reads.
Eric Anholt
2010-07-21
i965: Set the send commit bit on register spills as required pre-gen6.
Eric Anholt
2010-07-08
i965: Add 'wait' instruction support
Zhenyu Wang
2010-06-12
i965: Use the new message header format for FF_SYNC on gen6.
Zhenyu Wang
2010-06-12
i965: Add support for math instructions in the gen6 WM.
Zhenyu Wang
2010-05-18
i965: Remove constant or ignored-by-hw args from FF sync message setup.
Eric Anholt
2010-04-21
intel: Clean up chipset name and gen num for Ironlake
Zhenyu Wang
2010-03-22
i965: Ignore execution mask for the mov(m0, g0) of VS URB write header on SNB.
Eric Anholt
2010-03-10
i965: Use the PLN instruction when possible in interpolation.
Eric Anholt
2010-03-10
i965: Set up the execution size before relying on it.
Eric Anholt
2010-03-10
i965: Fix the response len of masked sampler messages for 8-wide dispatch.
Eric Anholt
2010-02-25
i965: Try to hook up the Sandybridge URB_WRITE SEND message.
Eric Anholt
2010-02-25
i965: Add SNB math opcode support.
Eric Anholt
2010-02-19
Replace the _mesa_*printf() wrappers with the plain libc versions
Kristian Høgsberg
2009-12-31
Merge branch 'mesa_7_7_branch'
Brian Paul
2009-12-28
intel: Silence compiler warnings.
Vinson Lee
2009-12-27
Merge branch 'mesa_7_6_branch' into mesa_7_7_branch
Brian Paul
2009-12-24
i965: Fix assert.
Vinson Lee
2009-12-22
intel: Replace IS_G4X() across the driver with context structure usage.
Eric Anholt
2009-12-22
intel: Replace IS_IGDNG checks with intel->is_ironlake or needs_ff_sync.
Eric Anholt
2009-11-06
i965: Use Compr4 instruction compression mode on G4X and newer.
Eric Anholt
2009-08-04
i965: Don't set pop_count in the reserved MBZ area of IF statements.
Eric Anholt
2009-08-04
i965: Spell "conditional" correctly.
Eric Anholt
2009-07-15
i965: the offset of any branch/jump instruction is in unit of 64bits on IGDNG
Xiang, Haihao
2009-07-13
i965: add support for new chipsets
Xiang, Haihao
2009-07-02
i965: fixes for JMPI
Xiang, Haihao
2009-06-30
i965: use BRW_MAX_MRF
Brian Paul
2009-06-26
i965: fix fetching constants from constant buffer in glsl path
Roland Scheidegger
2009-04-17
i915: fix broken indirect constant buffer reads
Brian Paul
2009-04-16
i965: implement relative addressing for VS constant buffer reads
Brian Paul
2009-04-14
i965: fix VS constant buffer reads
Brian Paul
2009-04-14
i965: checkpoint commit: VS constant buffers
Brian Paul
2009-04-09
i965: new SURF_INDEX_ macros
Brian Paul
2009-04-08
i965: set BRW_MASK_DISABLE flag in "send" instruction in brw_dp_READ_4()
Brian Paul
2009-04-03
i965: s/GL_FALSE/BRW_COMPRESSION_NONE/
Brian Paul
2009-04-03
i965: fix response length param in brw_dp_READ_4()
Brian Paul
2009-04-03
i965: added new brw_dp_READ_4() function
Brian Paul
2009-04-03
i965: new and updated comments
Brian Paul
2009-04-03
i965: comments for brw_SAMPLE()
Brian Paul
2009-03-13
i965: add some register number assertions
Brian Paul
2009-02-13
i965: minor clean-ups
Brian Paul
2009-01-05
i965: implement OPCODE_TRUNC (round toward zero) on vertex path.
Brian Paul
2008-11-02
i965: Merge GM45 into the G4X chipset define.
Eric Anholt
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