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path: root/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
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2011-03-16i965c: add MESA_FORMAT_RGBA8888_REV to brw_format_for_mesa_formatChia-I Wu
The framebuffer uses PIXEL_FORMAT_BGRA_8888 -> MESA_FORMAT_ARGB8888 while applications use PIXEL_FORMAT_RGBA_8888 -> MESA_FORMAT_RGBA8888_REV PIXEL_FORMAT_RGB_565 -> MESA_FORMAT_RGB565
2011-02-21intel: use pwrite for batchChris Wilson
It's faster. Not only is the memcpy more efficiently performed in the kernel (making up for the system call overhead), but by not using mmap we remove the greater overhead of tracking the vma of every batch. And it means we can read back from the batch buffer without incurring the cost of a uncached read through the GTT. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-02-21i965: drop state_bo references to batch_boChris Wilson
As we use state relocations and we know that all the state belongs to the same bo, we can drop the multiple references to the same bo. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-02-21i965: directly write wm state to batchChris Wilson
As we write directly into the batch in system memory, we do not need to write first to the stack (as was to avoid read back through the GTT) Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-02-21i965: Fallback on encountering a NULL render bufferChris Wilson
Following a GPU hang, or other error, the render target is not likely to have an allocated BO and so we must fallback to avoid using it. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=32534 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-02-05mesa/965: add support for GL_EXT_framebuffer_sRGB (v2)Dave Airlie
This adds i965 support for GL_EXT_framebuffer_sRGB, it introduces a new constant to say that the driver can support sRGB enabled FBOs since enabling the extension doesn't mean the driver can actually support sRGB. Also adds the suggested state flush in the core code suggested by Brian. fix the ARB_fbo color encoding. Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-01-16i965: add support for EXT_texture_sRGB_decodeDave Airlie
We just choose the texture format depending on the srgb decode bit for the sRGB formats. Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-01-14i965: fix fbo-srgb on i965.Dave Airlie
Until we get the EXT_framebuffer_sRGB extension we should bind the sRGB formats for FBO as linear. Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-01-10Revert "intel: Always allocate miptrees from level 0, not tObj->BaseLevel."Eric Anholt
This reverts commit 7ce6517f3ac41bf770ab39aba4509d4f535ef663. This reverts commit d60145d06d999c5c76000499e6fa9351e11d17fa. I was wrong about which generations supported baselevel adjustment -- it's just gen4, nothing earlier. This meant that i915 would have never used the mag filter when baselevel != 0. Not a severe bug, but not an intentional regression. I think we can fix the performance issue another way.
2011-01-07intel: Add a vtbl hook for determining if a format is renderable.Eric Anholt
By relying on just intel_span_supports_format, some formats that aren't supported pre-gen4 were not reporting FBO incomplete. And we also complained in stderr when it happened on i915 because draw_region gets called before framebuffer completeness validation.
2011-01-05intel: Always allocate miptrees from level 0, not tObj->BaseLevel.Eric Anholt
BaseLevel/MaxLevel are mostly used for two things: clamping texture access for FBO rendering, and limiting the used mipmap levels when incrementally loading textures. By restricting our mipmap trees to just the current BaseLevel/MaxLevel, we caused reallocation thrashing in the common case, for a theoretical win if someone really did want just levels 2..4 or whatever of their texture object. Bug #30366
2011-01-05intel: Clarify first_level/last_level vs baselevel/maxlevel by deletion.Eric Anholt
This has always been ugly about our texture code -- object base/max level vs intel object first/last level vs image level vs miptree first/last level. We now get rid of intelObj->first_level which is just tObj->BaseLevel, and make intelObj->_MaxLevel clearly based off of tObj->_MaxLevel instead of duplicating its code (incorrectly, as image->MaxLog2 only considers width/height and not depth!)
2011-01-05i965: Simplify the renderbuffer setup code.Eric Anholt
It was quite a mess by trying to do NULL renderbuffers and real renderbuffers in the same function. This clarifies the common case of real renderbuffers.
2011-01-04i965: Add support for SRGB DXT1 formats.Eric Anholt
This makes fbo-generatemipmap-formats GL_EXT_texture_sRGB-s3tc match fbo-generatemipmap-formats GL_EXT_texture_compression_s3tc and swrast in bad DXT1_RGBA alpha=0 handling, but it means we won't unpack and repack someone's textures into uncompressed SARGB8 format.
2010-12-10i965: Put common info on converting MESA_FORMAT to BRW_FORMAT in a table.Eric Anholt
There are exceptions to the table for depth texturing or rendering to not-quite-supported formats thanks to the non-orthogonal component selection for surface formats, but it's still a lot simpler.
2010-12-09intel: Set the swizzling for depth textures using the GL_RED depth mode.Eric Anholt
Fixes depth-tex-modes-rg.
2010-12-09i965: Set render_cache_read_write surface state bit on gen6 constant surfs.Eric Anholt
This is said to be required in the spec, even when you aren't doing writes.
2010-10-27i965: Make FS uniforms be the actual type of the uniform at upload time.Eric Anholt
This fixes some insanity that would otherwise be required for GLSL 1.30 bit ops or gen6 integer uniform operations in general, at the cost of upload-time pain. Given that we only have that pain because mesa's mangling our integer uniforms to be floats, this something that should be fixed outside of the shader codegen.
2010-10-22i965: Add support for pull constants to the new FS backend.Eric Anholt
Fixes glsl-fs-uniform-array-5, but not 6 which fails in ir_to_mesa.
2010-10-13Drop GLcontext typedef and use struct gl_context insteadKristian Høgsberg
2010-10-01i965: Enable GL_ARB_texture_rgIan Romanick
2010-09-24i965: Add support for rendering to SARGB8 FBOs.Eric Anholt
Tested with fbo-generatemipmap-formats GL_EXT_texture_srgb. The test still fails on SLA8, though.
2010-06-23Merge branch 'shader-file-reorg'Brian Paul
1. Move all GL entrypoint functions and files into src/mesa/main/ This includes the ARB vp/vp, NV vp/fp, ATI fragshader and GLSL bits that were in src/mesa/shader/ 2. Move src/mesa/shader/slang/ to src/mesa/slang/ to reduce the tree depth 3. Rename src/mesa/shader/ to src/mesa/program/ since all the remaining files are concerned with GPU programs. 4. Misc code refactoring. In particular, I got rid of most of the GLSL-related ctx->Driver hook functions. None of the drivers used them. Conflicts: src/mesa/drivers/dri/i965/brw_context.c
2010-06-11i965: Remove the surface key used to generate constant surfaces.Eric Anholt
We had to fill out all that junk when using the cache, but no more.
2010-06-11i965: Warning fixes from the i965-streaming merge.Eric Anholt
2010-06-11i965: Use the state base address to avoid relocations.Eric Anholt
This makes the binding table code simpler, and is required for gen6, which requires binding table addresses to be under 64k offset from the surface state base addr. No significant change in performance on firefox-talos-gfx.
2010-06-11i965: Remove caching of surface state objects.Eric Anholt
It turns out that computing a 56 byte key to look up a 20-byte object out of a hash table was some sort of a bad idea. Whoops. before: [ # ] backend test min(s) median(s) stddev. count [ 0] gl firefox-talos-gfx 37.799 38.203 0.39% 6/6 after: [ 0] gl firefox-talos-gfx 34.761 34.784 0.17% 5/6
2010-06-11i965: Convert the binding table to streamed indirect state.Eric Anholt
This slightly reduces reduces cairo-gl firefox-talos-gfx runtime on my Ironlake: before: [ # ] backend test min(s) median(s) stddev. count [ 0] gl firefox-talos-gfx 38.236 38.383 0.43% 5/6 after: [ 0] gl firefox-talos-gfx 37.799 38.203 0.39% 6/6 It turns out the cost of caching these objects and looking them up in the cache again is greater than the cost of just computing the object again, particularly when the overhead of having a separate BO to pin is removed. (Those that are paying close attention will note that this is a reversal of the path I was moving the driver in a couple of years ago. The major thing that has changed is that back then all state was recomputed when we wrapped the streaming state buffer, including recompiling our precious programs. Now, we're uncaching just the objects that are cheap to compute, and retaining caching of expensive objects)
2010-06-11i965: Split constant buffer setup from its surface state/binding state.Eric Anholt
This was bothering me when redoing the binding tables.
2010-06-10mesa: rename src/mesa/shader/ to src/mesa/program/Brian Paul
2010-06-10i965: Add support for GL_ALPHA framebuffer objects.Eric Anholt
2010-06-08intel: Convert remaining dri_bo_emit_reloc to drm_intel_bo_emit_reloc.Eric Anholt
The new API makes so much more sense, I'd like to forget how the old one worked.
2010-06-08intel: Change dri_bo_* to drm_intel_bo* to consistently use new API.Eric Anholt
The slightly less mechanical change of converting the emit_reloc calls will follow.
2010-06-02intel: Remove a leftover DRI1/DRI2 conditionalKristian Høgsberg
2010-04-22i965: Fix assertion for surface tile offset usage on Ironlake.Eric Anholt
Fixes assertion failure in fbo-generatemipmap-npot.
2010-03-17intel: Replace mt->pitch with mt->region->pitch.Eric Anholt
The pitch is not really an inherent part of the miptree, since it's not part of any of the layout calculations, and it's dictated by the libdrm-allocated region pitch now.
2010-03-05intel: Remove support for the DRI1 TFP extension.Eric Anholt
2010-03-05i965: Remove the paths for making a const surface object for a NULL BO.Eric Anholt
2010-02-25i965: Update WM surface state setup for sandybridge's new BLEND_STATE.Eric Anholt
2010-01-26i965: Add support for EXT_draw_buffers2.Eric Anholt
2010-01-19i965: Allow for variable-sized auxdata in the state cache.Eric Anholt
Everything has been constant-sized until now, but constant buffer handling changes will make us want some additional variable sized array.
2010-01-05i965: Fix build after blind merge of mesa 7.7 by Brian.Eric Anholt
2010-01-04Merge branch 'mesa_7_7_branch'Brian Paul
Conflicts: docs/relnotes.html src/gallium/drivers/llvmpipe/lp_tex_sample_c.c src/gallium/drivers/r300/r300_cs.h src/mesa/drivers/dri/i965/brw_wm_surface_state.c src/mesa/main/enums.c
2010-01-04i965: Fix the surface offset calculation for tiled buffers.Eric Anholt
If we ever had a non-tile-aligned tiled renderbuffer, the math was all off. Use the existing x,y coordinates instead of trying to reconstruct them from an incorrectly-calculated offset value.
2009-12-29mesa: implement per-buffer color maskingBrian Paul
This is part of the GL_EXT_draw_buffers2 extension and part of GL 3.0. The ctx->Color.ColorMask field is now a 2-D array. Until drivers are modified to support per-buffer color masking, they can just look at the 0th color mask. The new _mesa_ColorMaskIndexed() function will be called by glColorMaskIndexedEXT() or glColorMaski().
2009-12-22intel: Replace IS_G4X() across the driver with context structure usage.Eric Anholt
Saves ~2KB of code.
2009-12-14i965: Use current draw buffer instead of drawable visual to get alpha bitsIan Romanick
Use the currently bound draw buffer instead of the visual from the drawable used to create the context. This cause problems generating mipmaps for an RGBA texture in an RGB context. This fixes the failure in piglit's glsl-lod-bias test reported in bug #25614.
2009-12-10intel: Remove ARGB internal_format == GL_RGB hacksIan Romanick
Now that XRGB is supported, we don't need to hack around cases of an RGBA format buffer with an internal format of GL_RGB.
2009-12-10i965: Fix handling of drawing to MESA_FORMAT_XRGB8888Ian Romanick
It turns out that 965 and friends cannot actually render to an xRGB surfaces. Instead, the surface has to be RGBA with writes to alpha disabled and the blend function modified to always use 1.0 for destination alpha.
2009-12-10intel: Axe intel_renderbuffer::texformatIan Romanick
Since the texformat branch merge, the value of intel_renderbuffer::texformat is just a copy of gl_renderbuffer::Format.